JPS60144026A - ビタビ復号器 - Google Patents
ビタビ復号器Info
- Publication number
- JPS60144026A JPS60144026A JP65184A JP65184A JPS60144026A JP S60144026 A JPS60144026 A JP S60144026A JP 65184 A JP65184 A JP 65184A JP 65184 A JP65184 A JP 65184A JP S60144026 A JPS60144026 A JP S60144026A
- Authority
- JP
- Japan
- Prior art keywords
- code
- dummy
- bits
- bit
- metric
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP65184A JPS60144026A (ja) | 1984-01-06 | 1984-01-06 | ビタビ復号器 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP65184A JPS60144026A (ja) | 1984-01-06 | 1984-01-06 | ビタビ復号器 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60144026A true JPS60144026A (ja) | 1985-07-30 |
| JPH0144057B2 JPH0144057B2 (enExample) | 1989-09-25 |
Family
ID=11479610
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP65184A Granted JPS60144026A (ja) | 1984-01-06 | 1984-01-06 | ビタビ復号器 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60144026A (enExample) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03196732A (ja) * | 1989-12-26 | 1991-08-28 | Matsushita Electric Ind Co Ltd | データ受信装置 |
| US6564343B1 (en) | 1999-02-19 | 2003-05-13 | Fujitsu Limited | Bit interleave circuit and bit deinterleave circuit |
| US7590182B2 (en) | 2001-03-23 | 2009-09-15 | Qualcomm Incorporated | Method and apparatus for utilizing channel state information in a wireless communication system |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57155857A (en) * | 1981-03-23 | 1982-09-27 | Kokusai Denshin Denwa Co Ltd <Kdd> | Maximum likelihood method and apparatus for error |
-
1984
- 1984-01-06 JP JP65184A patent/JPS60144026A/ja active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57155857A (en) * | 1981-03-23 | 1982-09-27 | Kokusai Denshin Denwa Co Ltd <Kdd> | Maximum likelihood method and apparatus for error |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03196732A (ja) * | 1989-12-26 | 1991-08-28 | Matsushita Electric Ind Co Ltd | データ受信装置 |
| US6564343B1 (en) | 1999-02-19 | 2003-05-13 | Fujitsu Limited | Bit interleave circuit and bit deinterleave circuit |
| US7590182B2 (en) | 2001-03-23 | 2009-09-15 | Qualcomm Incorporated | Method and apparatus for utilizing channel state information in a wireless communication system |
| US7949060B2 (en) | 2001-03-23 | 2011-05-24 | Qualcomm Incorporated | Method and apparatus for utilizing channel state information in a wireless communication system |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0144057B2 (enExample) | 1989-09-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100335038B1 (ko) | 코드분할다중접속시스템어플리케이션용다중속도직렬비터비디코더 | |
| JPS6356728B2 (enExample) | ||
| US5436918A (en) | Convolutional encoding/decoding apparatus with fixed bit insertion | |
| US5446746A (en) | Path memory apparatus of a viterbi decoder | |
| US8578254B1 (en) | Modified trace-back using soft output Viterbi algorithm (SOVA) | |
| JPH07273813A (ja) | ソフトシンボルの生成方法と装置 | |
| KR100779782B1 (ko) | 비터비 디코더 용 고속 acs 유닛 | |
| JP2755045B2 (ja) | ビタビ復号器 | |
| JPH0316046B2 (enExample) | ||
| KR20010014661A (ko) | 비터비 복호기 및 송신 장치 | |
| US6697442B1 (en) | Viterbi decoding apparatus capable of shortening a decoding process time duration | |
| JPS60144026A (ja) | ビタビ復号器 | |
| JP7007115B2 (ja) | ビタビ復号装置、及び、ビタビ復号方法 | |
| US6769090B1 (en) | Unified technique for multi-rate trellis coding and decoding | |
| CN101228699A (zh) | 用于对尾比特卷积码译码的方法 | |
| US7392463B2 (en) | Data reproducing apparatus avoiding selection of incorrect path | |
| JPH06284018A (ja) | ビタビ復号方法および誤り訂正復号化装置 | |
| JP4580927B2 (ja) | ビタビ復号装置、およびビタビ復号方法 | |
| JP4047697B2 (ja) | ビタビ復号装置 | |
| JP2575853B2 (ja) | ビタビ復号回路 | |
| JP2591332B2 (ja) | 誤り訂正復号装置 | |
| JP3720251B2 (ja) | ヴィタビ復号器 | |
| US7260154B1 (en) | Method and apparatus for implementing a multiple constraint length Viterbi decoder | |
| JP3837913B2 (ja) | ビタビ復号器 | |
| JP2002076924A (ja) | ビタビ復号器 |