JPS60142808U - Muting circuit - Google Patents

Muting circuit

Info

Publication number
JPS60142808U
JPS60142808U JP3080784U JP3080784U JPS60142808U JP S60142808 U JPS60142808 U JP S60142808U JP 3080784 U JP3080784 U JP 3080784U JP 3080784 U JP3080784 U JP 3080784U JP S60142808 U JPS60142808 U JP S60142808U
Authority
JP
Japan
Prior art keywords
state
control signal
recording
switch means
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3080784U
Other languages
Japanese (ja)
Inventor
豊 越智
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP3080784U priority Critical patent/JPS60142808U/en
Publication of JPS60142808U publication Critical patent/JPS60142808U/en
Pending legal-status Critical Current

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  • Television Signal Processing For Recording (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案実施例の回路ブロック図、第2図はVT
Rのローディング状態を示す平面図、第3図は従来例を
示す回路ブロック図、第4図は第1図及び第3図におけ
る波形図である。 主な符号の説明、H・・・・・・音声記録再生ヘッド、
・ 8・・・・・・第1スイッチ手段、A・・・・・・
制御信号、B・・・・・・ミュート信号、14・・間第
2スイッチ手段、9・・・・・・バイアス発振器、R・
・−抵抗。Q・・間第3スイッチ手段。
Figure 1 is a circuit block diagram of an embodiment of the present invention, Figure 2 is a VT
FIG. 3 is a circuit block diagram showing a conventional example, and FIG. 4 is a waveform diagram in FIGS. 1 and 3. Explanation of main symbols: H...Audio recording/playback head;
・8...First switch means, A...
Control signal, B... Mute signal, 14... Second switch means, 9... Bias oscillator, R...
-Resistance. Q. Third switch means.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 音声記録再生ヘッドと、該ヘッドのコイルの音声再生回
路に接続される一端をVTRの記録状態゛を指定する制
御信号の記録状態である第1の状態により接地する第1
のスイッチ手段と、前記制御信号が抵抗を介して付与さ
れかつ前記ヘッドのコイルの音声記録回路に接続される
他端を前記制御信号の記録状態以外の状態である第2の
状態により接地する第2のスイッチ手段と、記録開始時
に所定時間ミュート信号を発生する手段と、該ミュート
信号により前記音声記録回路をミュートする手段と前記
ヘッドのコイルの前記他端に接続されかつ前記制御信号
の第1の状態により発振開始され、第2の状態により発
振停止されるバイアス発振器と、前記抵抗と前記第2ス
イッチ手段との接続点に接続されかつ前記ミュート信号
出力時に前”記第1スイッチ手段及びバイアス発振器へ
の制御信号を前記第1の状態に保持したまま前記第2の
スイッチ手段への制御信号を前記第2の状態とする第3
のスイッチ手段とを備えるVTR音声記録再生回路のミ
ューティング回路。
An audio recording/reproducing head and one end of a coil of the head connected to an audio reproducing circuit are grounded in a first state, which is a recording state of a control signal specifying a recording state of the VTR.
a switch means to which the control signal is applied via a resistor and whose other end, which is connected to the audio recording circuit of the coil of the head, is grounded in a second state that is a state other than the recording state of the control signal; 2 switch means, means for generating a mute signal for a predetermined time at the start of recording, means for muting the audio recording circuit by the mute signal, and a first switch means connected to the other end of the coil of the head and for generating the control signal. a bias oscillator that starts oscillating in response to a state and stops oscillating in a second state; A third switch that sets the control signal to the second switch means to the second state while maintaining the control signal to the oscillator in the first state.
A muting circuit for a VTR audio recording and reproducing circuit, comprising a switch means.
JP3080784U 1984-03-02 1984-03-02 Muting circuit Pending JPS60142808U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3080784U JPS60142808U (en) 1984-03-02 1984-03-02 Muting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3080784U JPS60142808U (en) 1984-03-02 1984-03-02 Muting circuit

Publications (1)

Publication Number Publication Date
JPS60142808U true JPS60142808U (en) 1985-09-21

Family

ID=30530830

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3080784U Pending JPS60142808U (en) 1984-03-02 1984-03-02 Muting circuit

Country Status (1)

Country Link
JP (1) JPS60142808U (en)

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