JPS6226638U - - Google Patents
Info
- Publication number
- JPS6226638U JPS6226638U JP11630685U JP11630685U JPS6226638U JP S6226638 U JPS6226638 U JP S6226638U JP 11630685 U JP11630685 U JP 11630685U JP 11630685 U JP11630685 U JP 11630685U JP S6226638 U JPS6226638 U JP S6226638U
- Authority
- JP
- Japan
- Prior art keywords
- recording
- erasing head
- signal
- coil
- full
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 2
- 230000010355 oscillation Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 1
Description
第１図は本考案の頭出し信号記録回路を示す回
路図、第２図は従来の頭出し信号記録回路を示す
回路図、第３図は第１図及び第２図において、頭
出し信号記録用の制御信号に同期した全幅消去ヘ
ツドの消去電流エンベロープを示すタイミングチ
ヤート、第４図は第２図において、頭出し信号記
録用の制御信号に同期した音声消去ヘツドの消去
電流エンベロープを示すタイミンダチヤートであ
る。
主は図番の説明、６……２次コイル、１０……
音声消去ヘツド、１１……全幅消去ヘツド、１７
，２０……トランジスタ、２５……磁気テープ、
２６……発振回路、２７……コンデンサ。
FIG. 1 is a circuit diagram showing a cue signal recording circuit of the present invention, FIG. 2 is a circuit diagram showing a conventional cue signal recording circuit, and FIG. 3 is a cue signal recording circuit of the present invention. 4 is a timing chart showing the erasing current envelope of the full-width erasing head synchronized with the control signal for cueing signal recording in FIG. It's a chat. Mainly explanation of drawing numbers, 6...secondary coil, 10...
Audio erase head, 11...Full width erase head, 17
, 20...transistor, 25...magnetic tape,
26...Oscillation circuit, 27...Capacitor.
Claims (1)
ツチング素子によりそのインピーダンスが可変さ
れる全幅消去ヘツドにて、磁気テープに頭出し信
号を記録する磁気記録再生装置において、前記頭
出し信号の記録時に、音声消去ヘツド及び前記全
幅消去ヘツドとその２次コイルが接続された交流
バイアス記録用の発振回路から前記音声消去ヘツ
ドに生ずるノイズを、前記音声消去ヘツド及び２
次コイル付に介挿したコンデンサにて除去するこ
とを特徴とする頭出し信号記録回路。 In a magnetic recording/reproducing apparatus that records a cue signal on a magnetic tape using a full-width erasing head whose impedance is varied by a switching element to which a control signal for recording the cue signal is input, when recording the cue signal, Noise generated in the audio erasing head from an oscillation circuit for AC bias recording to which the audio erasing head and the full-width erasing head and its secondary coil are connected is removed from the audio erasing head and the second coil.
A cueing signal recording circuit characterized in that the signal is removed by a capacitor inserted in the next coil.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11630685U JPH0648581Y2 (en) | 1985-07-29 | 1985-07-29 | Cue signal recording circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11630685U JPH0648581Y2 (en) | 1985-07-29 | 1985-07-29 | Cue signal recording circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6226638U true JPS6226638U (en) | 1987-02-18 |
| JPH0648581Y2 JPH0648581Y2 (en) | 1994-12-12 |
Family
ID=31000771
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11630685U Expired - Lifetime JPH0648581Y2 (en) | 1985-07-29 | 1985-07-29 | Cue signal recording circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0648581Y2 (en) |
-
1985
- 1985-07-29 JP JP11630685U patent/JPH0648581Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0648581Y2 (en) | 1994-12-12 |
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