JPS5942513U - Switching noise prevention circuit for magnetic recording and reproducing equipment - Google Patents

Switching noise prevention circuit for magnetic recording and reproducing equipment

Info

Publication number
JPS5942513U
JPS5942513U JP13785682U JP13785682U JPS5942513U JP S5942513 U JPS5942513 U JP S5942513U JP 13785682 U JP13785682 U JP 13785682U JP 13785682 U JP13785682 U JP 13785682U JP S5942513 U JPS5942513 U JP S5942513U
Authority
JP
Japan
Prior art keywords
circuit
recording
switch
command signal
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13785682U
Other languages
Japanese (ja)
Inventor
豊 越智
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP13785682U priority Critical patent/JPS5942513U/en
Publication of JPS5942513U publication Critical patent/JPS5942513U/en
Pending legal-status Critical Current

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  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来回路の構成図、第2図は同回路の゛タイム
チャート図、第3図は本考案回路の1実施例の回路構成
図、第4図は同回路の要部のタイムチャート図である。 主な図番の説明、1・・・・・・磁気ヘッド、2・・・
・・・入力手段、4.5・・・・・・第1、第2スイッ
チ回路、11・・・・・・指令信号形成手段、12・・
・・・・バイアス信号発生回路、10・・・・・・制御
信号形成回路、13・・・・・・付与回路、14・・・
・・・解除回路、15・・・・・・遅延回路。
Figure 1 is a configuration diagram of a conventional circuit, Figure 2 is a time chart diagram of the same circuit, Figure 3 is a circuit diagram of an embodiment of the circuit of the present invention, and Figure 4 is a time chart of the main parts of the circuit. It is a diagram. Explanation of main figure numbers, 1...Magnetic head, 2...
...Input means, 4.5...First and second switch circuits, 11...Command signal forming means, 12...
...Bias signal generation circuit, 10...Control signal formation circuit, 13...Providing circuit, 14...
...Release circuit, 15...Delay circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 音声信号を記録、再生する磁気ヘッドと、音声信号を入
力する手段と、前記磁気ヘッドからの再生出力信号と前
記入力手段からの音声信号を入力してこの入力信号の一
方を出力する第1スイッチ回路と、前記磁気ヘッドの1
端を記録モード時に接地する第2スイッチ回路と、記録
指令信号と再生指令信号を形成する指令信号形成手段と
、記録指令信号に基づき起動されるバイアス信号発生回
路と、指令信号形成手段出力に基づき前記第1スイッチ
回蕗を制御する信号を作成する手段と、記録モード時、
前記第1スイッチ回路出力と共に前記磁気ヘッドの他端
に前記発生回路出力を付与する回路と、記録モード時、
前記付与回路の接地点への接続を解除する回路と、再生
モードから記録モードへの転換時、前記第1、第2スイ
ッチ回路の応答遅れ時間以上の時間にわたって前記解除
回路の解除動作を遅延させる回路とを備えてなる記録再
生装置の切換えノイズ防止回路。
a magnetic head for recording and reproducing audio signals; a means for inputting audio signals; and a first switch for inputting a reproduction output signal from the magnetic head and an audio signal from the input means and outputting one of the input signals. a circuit, and one of the magnetic heads.
a second switch circuit whose end is grounded in the recording mode; a command signal forming means for forming a recording command signal and a reproduction command signal; a bias signal generating circuit activated based on the recording command signal; and a bias signal generating circuit activated based on the output of the command signal forming means. means for creating a signal for controlling the first switch; and in a recording mode;
a circuit for applying the generating circuit output to the other end of the magnetic head together with the first switch circuit output; and in a recording mode;
a circuit that releases the connection of the application circuit to a ground point; and a circuit that delays the release operation of the release circuit for a time longer than the response delay time of the first and second switch circuits when switching from playback mode to recording mode. A switching noise prevention circuit for a recording/reproducing device comprising a circuit.
JP13785682U 1982-09-10 1982-09-10 Switching noise prevention circuit for magnetic recording and reproducing equipment Pending JPS5942513U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13785682U JPS5942513U (en) 1982-09-10 1982-09-10 Switching noise prevention circuit for magnetic recording and reproducing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13785682U JPS5942513U (en) 1982-09-10 1982-09-10 Switching noise prevention circuit for magnetic recording and reproducing equipment

Publications (1)

Publication Number Publication Date
JPS5942513U true JPS5942513U (en) 1984-03-19

Family

ID=30309507

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13785682U Pending JPS5942513U (en) 1982-09-10 1982-09-10 Switching noise prevention circuit for magnetic recording and reproducing equipment

Country Status (1)

Country Link
JP (1) JPS5942513U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01282731A (en) * 1988-01-22 1989-11-14 Sharp Corp Analog signal switching device for optical memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01282731A (en) * 1988-01-22 1989-11-14 Sharp Corp Analog signal switching device for optical memory device

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