JPS60141573U

JPS60141573U - Automatic testing equipment for electrical circuits

Info

Publication number: JPS60141573U
Application number: JP2459784U
Authority: JP
Inventors: 小木曽　利勝
Original assignee: 三菱電機株式会社
Priority date: 1984-02-24
Filing date: 1984-02-24
Publication date: 1985-09-19

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は従来の試験装置を示す説明図、第２図はこの考
案の一実施例を示す構成図、第３図はこの考案の一実施
例の動作を示す流れ図、第４図はこの考案の他の実施例
を示す構成図、第５図は第４図の動作を示す流れ図で、
第５図ａは入力装置部の動作を示す流れ図、第５図すは
自動試験装置本体の動作を示す流れ図、第６図はマトリ
ックス回路の他の例を示す回路図である。図中、１０は被試験ユニット、１１は端子、１２は試験
用コネクタ、１３．４９はマトリックス回路、１４は母
線、１５ａ、１５ｂ、３２ａ、３２ｂはキースイッチ、
１６，３１，４７は操作ボ　　　　゛−ド、１７，３３
は押釦スイッチ、１８．３４はトグルスイッチ、１９．
３５はランプ、２０，３６は命令キースイッチ、２１．
３７は取消しキー　　　・スイッチ、２２．３８はリセ
ットキースイッチ、２３．３９は完了キースイッチ、２
４，２４ｂ。２４ｃはＣＰＵ％　２５　ａｔ　　４１　ａｔ　　４４
　ａは結線条件記憶部、２５ｂ、４１ｂ、４４ｂは試験
条件記憶部、２６はパネル操作治具、２７はテンキー、
３０は入力装置部、４２は回路パターンセレクトスイッ
チ、４３は自動試験装置本体である。なお、図中同一符号は夫々間−又は相当部分を示す。Fig. 1 is an explanatory diagram showing a conventional test device, Fig. 2 is a configuration diagram showing an embodiment of this invention, Fig. 3 is a flowchart showing the operation of an embodiment of this invention, and Fig. 4 is a diagram showing the operation of an embodiment of this invention. FIG. 5 is a flowchart showing the operation of FIG. 4.
FIG. 5a is a flow chart showing the operation of the input device section, FIG. 5 is a flow chart showing the operation of the automatic test apparatus main body, and FIG. 6 is a circuit diagram showing another example of the matrix circuit. In the figure, 10 is the unit under test, 11 is a terminal, 12 is a test connector, 13.49 is a matrix circuit, 14 is a bus bar, 15a, 15b, 32a, 32b are key switches,
16, 31, 47 are operation boards, 17, 33
is a push button switch, 18.34 is a toggle switch, 19.
35 is a lamp; 20 and 36 are command key switches; 21.
37 is a cancel key/switch, 22.38 is a reset key switch, 23.39 is a completion key switch, 2
4,24b. 24c is CPU% 25 at 41 at 44
a is a wiring condition storage section, 25b, 41b, 44b are test condition storage sections, 26 is a panel operation jig, 27 is a numeric keypad,
30 is an input device section, 42 is a circuit pattern selection switch, and 43 is an automatic testing device main body. It should be noted that the same reference numerals in the drawings indicate corresponding parts.

Claims

[Scope of utility model registration request]

(1) an operation board for inputting connection conditions and test conditions, a test connector, a matrix circuit for making connections between the operation board and the test connector, a connection condition storage unit;
It is equipped with a test condition storage unit and a central processing unit, and when inputting, connect the above test connector to the terminal of the unit under test.
Input the wiring conditions from the operation board, form the matrix circuit, and at the same time store the wiring conditions in the wiring condition storage section, input the test conditions, operate the unit under test, and check if its operating condition is good. For example, when repeating the operation of storing the test conditions in the test condition storage section and testing the same circuit unit again, an automatic testing device for an electric circuit is characterized in that when a unit of the same circuit is to be tested again, automatic wiring and automatic testing are performed by calling it up by key operation.

(2) Memorization of wiring conditions and test conditions is performed by a separately provided input device section, and when testing the unit under test, after setting the data in each of the above memory sections to the memory section of the automatic test equipment main body, The automatic testing device for electric circuits according to claim 1, wherein the test connector is connected to a terminal portion of a unit under test, and automatic wiring and automatic testing are performed by calling by key operation.