JPS60138619A - Auto-zero circuit - Google Patents

Abstract

PURPOSE:To obtain an auto-zero circuit which has high accuracy and a short time needed for auto-zero by using an output circuit for fine adjustment signal which consists of a comparator, an up/down counter and a D/A converter. CONSTITUTION:A timer circuit 15 has an output H in about 1msec after input of an auto-zero start pulse SRT, and an up/down counter 10 is ready for counting. If L is supplied from a comparator 9 at this time point, the count value is increased together with the value Vf of the output voltage of a D/A converter 11. Thus the output voltage e2 approximates to 0. While the count value and the value Vf are reduced if H is supplied from the comparator 9. Then the voltage e2 approximates to 0. Finally an output circuit 8 for fine adjustment voltage is balanced so as to satisfy e2=0. The time needed to secure balancing is shorter than the H output time of the circuit 15. Therefore the zero correction is through with the voltage e2 when the circuit has an L output after the H output time.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application This invention relates to an auto-zero circuit that automatically adds a correction signal to an analog original signal to correctly output a zero signal.

(B) Prior Art Most conventional auto-zero circuits use a D/A converter to create a correction signal, but in order to widen the auto-zero range and maintain high accuracy, a high-resolution D/A converter is required. , becomes expensive.

Therefore, it has been proposed to obtain high resolution by combining two low-resolution D/A converters, but this has drawbacks such as the time required for auto-zeroing and the adjustment being complicated.

(-9 Objectives) It is an object of the present invention to provide an auto-zero circuit that can be constructed at low cost, has high accuracy, and requires a relatively short time for auto-zero.

(D) Configuration The auto-zero circuit of the present invention has the following features: (a) A plurality of reference values V1t- from the first reference value ■l to the first reference value ■l which is larger than the first reference value ■l by an integer n times the constant step value Va. Reference value output circuit that outputs simultaneously, (b)
The input signal e1 is simultaneously compared with each reference value ■1 by the auto zero start signal input from the outside, and the input signal is the highest under any condition, whether it is smaller than the input signal e1, or larger or smaller than the input signal e1. (Q) a coarse adjustment signal output circuit that outputs a signal with a value corresponding to a reference value Vm close to el as a rough adjustment signal C and holds the output; (Q) a first circuit that subtracts the coarse adjustment signal ■C from the input signal e1; Subtraction circuit, ((1) After the mill adjustment signal Ic is output, the step value vb is continuously or sufficiently smaller than the step value Va.
(e) a second subtraction circuit that subtracts the fine adjustment signal Vf from the output of the first subtraction circuit; When the output of the second subtraction circuit crosses zero? The device is configured to include a comparator circuit that stops the change in the Ik adjustment signal Vf and holds the output of the fine adjustment signal Vf.

The above fine adjustment signal "The output circuit is an analog integrator")/
A converter can be used. When using a D/A converter, high resolution is not required.

It goes without saying that the above subtraction includes addition of signals of opposite polarity.

(→Embodiment (1) shown in FIG. 1 is an embodiment of the auto-zero circuit of the present invention. Signals input from the outside are an analog input voltage e and an auto-zero start pulse SRT, and are output to the outside. The signal is an analog output voltage e2.For convenience of explanation, it is assumed that the analog input voltage el does not become negative.

The analog input voltage e1 is divided into two parts: a buffer amplifier (2) 'i', and one is a coarse adjustment voltage output circuit (4).
are input to the comparators (C1) to (C8) of , and the other is the 1st $, 3'! It is input to the I-circuit (7).

(3) is a reference voltage output circuit, with resistors (R+) to (Rs
), and simultaneously outputs reference voltages (1) from the first reference voltage (1) to the eighth reference voltage (28).

The difference between the circumscribed reference voltages, that is, Vj--vtj--1)
That is, the step voltage Va is a constant value. As will become clear with the explanation that will be given later, Va is set to a value slightly smaller than the maximum output voltage of the D/A converter (11), and the eighth reference voltage (8), that is, Bva, is the analog input voltage e! The voltage is set to be smaller by Va than a voltage slightly larger than the expected zero level fluctuation range of . 1st
The eighth standard voltage ■l to eighth reference voltage ■8 are input to comparators (C+) to (C8), respectively.

The comparators (Cat) to (C11・) are connected to the input voltage e
Simultaneously compare l and each reference voltage V1, and find out which one is the former? 'HHu when it is bigger than the moxibustion person, L when it is smaller 11
is output to the encoder (5).

The encoder (5) outputs the maximum value of the input terminal number of 1" in binary code. For example, a 1 priority encoder of a commercially available IC can be used. However, if the auto zero start or Ha/L
/7SRT is input, one shot
i/7. If the circuit (14) is short (for example xmse
The maximum f1 is determined only while outputting c), and thereafter the output at the time of the second determination is held.

When the encoder (5) outputs a binary code, the relay coils/'(Lt) to (L4) are energized correspondingly, which turns on the relay contacts (Sl) to (S4), but the relay contacts (Sl) to (S4) are carriers: resistors (r
A current generating circuit (6) for the current flowing through the resistor (Rf) together with (l) to (r4) is formed by 41'Y, and outputs a current IC according to the binary code. Resistor (rl) ~ (
r4) is O when all relay contacts C3+) - (S4) are off, and -V% when only relay contact (Sl) is on.
10' When only relay contact (S2) is on -2va/
R, or -4V when only relay contact (S3) is on
a, /H,. , , ) When only the two contact (S4) is on - eVa/R □. . The current is set to flow through the entire resistor (Rf). 1 of relay contacts (S+) to (S4)
When more than one relay is turned on, the current corresponding to each relay contact is added and output.

So, for example, if e is larger than ■5 and smaller than ■6, the comparators CC5) to (C5) output HH1.
1° comparator (C6) to (C11) output PI L
11, the encoder (5) outputs 5'' in binary code and relay coil /L/(Ll) and (L3
) is energized, relay contacts (S+) and (S3) are turned on, and the output current IQ of the current generating circuit (6) is -5V to 15V. becomes. Generally speaking, the coarse adjustment signal output circuit (4) includes comparators (C1) to (CIl), an encoder (5), relay coils/'(L+) to (L4), and a current generation circuit (6). input signal e1 when auto zero start buff +/7.3RT is input.
The voltage of the reference value Vm which is smaller and closest to the input (i''f number el) is outputted as the gate adjustment current C, but with a negative sign.

The first subtractor circuit (7) is an adder circuit consisting of a resistor (Rho), and since it is added to C and f through El gold (Elo), -101 + IQ - Rf f (ID to be calculated) The Rf IC-RfQ value is always smaller than Va and has a negative sign.

(8) is a fine adjustment voltage output circuit, which includes a comparator (
9), an up/down counter (10) and a D/A converter (11). The D/A converter (l) outputs an I]4 according to the output of the up/down counter (10).
A voltage -Vf with a negative sign at Vf is output to the second subtraction circuit (12). The up/down counter (10) is enabled to count when the timer circuit (15) is input from the timer circuit (15), and holds the count value when r'L is 11. The direction is count up when the output of comparator (9) is L1 @E
When I II, the countdown starts.

The timer circuit Wr (15) is set to "f" for a certain period of time after the one-shot bus μ bus circuit (14) outputs a short value.
1''. This fixed time is slightly longer than the product of the period of the clock pulse and the full count value of the up/down counter (10).

Now, when the auto zero start pulse y and SRT are input from the outside, the coarse adjustment voltage output circuit (4)
is activated and coarse adjustment is performed within about 1 m soc, and v
, this voltage is smaller than Va at the output of the 1 subtraction circuit (7). If the addition result is positive, the comparator (9) outputs "■
]゛°. On the other hand, if the addition result is negative, t':
The comparator (9) outputs "L"'.

Auto zero start pulse SRT is input and approximately 1.
After mBeQ, 11 timer circuit (15) outputs “JT”
Therefore, the up/down counter (lO) becomes capable of counting. At this time, the comparator (9) is empty.

is input, the up/down counter (10) increases by the count value ff1Th, so the value Vf of the output voltage of the D/A converter (11) increases. Then 0
The value of 2 approaches 0. On the other hand, Compare Lake (9) to 1
If H is input, the up/down counter (10
) decreases the count value, so the D/A j parameter (
The value Vf of the output voltage of 11) decreases, and the value of C2 approaches zero. In the end, the fine adjustment voltage output circuits (8) are arranged in parallel so that C2=0. The time it takes to complete the change is shorter than the "H" output time of the timer circuit (15), so when the timer circuit (15) finishes the "II" output time and becomes the L11 output, the output voltage e2 This means that zero calibration has been completed.

Another example is one in which, when the zero-repetition μ fluctuation of the input voltage el has both positive and negative polarities, the reference voltage output circuit outputs a reference voltage with both positive and negative polarities.

(f) Effect The auto-zero circuit of this invention has a high resolution D/A.
A wide auto-zero range and high-accuracy auto-zero function can be obtained without using a converter.

A further advantage is that the autozero time required is relatively short or fast. The wavelength-tunable absorbance n1 detector, which is most commonly used in liquid chromatographs, automatically sets the optimal wavelength for each peak component that is separated and eluted from the force. detection is performed. However, when the wavelength is changed, the baseline changes because the absorbance of the carrier liquid flowing through the column changes with respect to the wavelength. In such a case, if a high-speed wavelength change is performed and a high-speed O-1-zero mechanism is provided, even a relatively r-tangential peak can be detected by changing the wavelength, but the auto-zero circuit line of this invention It is extremely useful because it is fast.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a circuit diagram of an actual example of the auto-zero circuit of the present invention. (1)...Auto-zero circuit, (3)...Reference voltage output circuit, (Su...concession voltage output circuit, (7)...First subtraction circuit, (Su...P, Adjustment voltage output circuit, (12)...Second reduction circuit. 1, i Agent Patent attorney Haku Obe Nogawa

Claims (1)

[Claims] 1. (a) Simultaneously outputting a plurality of reference values ■1 from a first reference value ■1 to a first reference value ■1 that is larger than the first reference value ■1 by an integral number n times a constant step value Va. Reference value output circuit, (
1)) Simultaneously compare the input signal el and each reference value v1 using the auto zero start signal input from the outside, and determine whether the input signal e1 is smaller than or larger than the input signal e1, or whether it is larger or smaller. A coarse adjustment signal output circuit that outputs a signal with a value corresponding to the reference value Vm closest to the input signal e1 as a coarse adjustment signal IC and holds the output; (Q) Subtracts the smooth adjustment signal IC from the input signal e1; a first subtraction circuit; (d) after the rough adjustment signal IC is output, the step value vb is continuously or sufficiently smaller than the step value Va;
a fine adjustment signal output circuit that outputs a signal that changes stepwise as a fine adjustment signal Vf;
and (f) a comparator circuit that stops changing the fine adjustment signal Vf and holds the output of the fine adjustment signal Vf when the output of the second subtraction circuit crosses zero. Features an auto-zero circuit.