JPS60133789A - Circuit board and method of producing same - Google Patents
Circuit board and method of producing sameInfo
- Publication number
- JPS60133789A JPS60133789A JP24119383A JP24119383A JPS60133789A JP S60133789 A JPS60133789 A JP S60133789A JP 24119383 A JP24119383 A JP 24119383A JP 24119383 A JP24119383 A JP 24119383A JP S60133789 A JPS60133789 A JP S60133789A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- heat
- sealing resin
- wiring pattern
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
この発明は回路基板およびその製造方法に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit board and a method of manufacturing the same.
従来の回路基板は絶軸i板よに鋼箔を貼った基板t−パ
ターンエツチング等で配線パターン印刷ケ、エツチング
レジストを除去してなり、この上に電子部品などを半田
づけで接続している。Conventional circuit boards are made by attaching steel foil to the rigid I-board, printing wiring patterns using T-pattern etching, etc., and removing the etching resist, on which electronic components are connected by soldering. .
しかしこの従来の回路基板では、電子部品の取付、接続
に半田づけをしなければならず、TJSIのような端子
数が多いものは、端子の間隔が狭く半田づけが難しい。However, with this conventional circuit board, soldering is required to attach and connect electronic components, and with a board like TJSI which has a large number of terminals, the spacing between the terminals is narrow and soldering is difficult.
また液晶パネルのように半田づけできないものもある。There are also some items that cannot be soldered, such as LCD panels.
さらに回路基板の製造にあたっては、エツチング後レジ
ストを除去する必要があり、そのための工程を要する、
といった欠点があった。Furthermore, when manufacturing circuit boards, it is necessary to remove the resist after etching, which requires a process.
There were some drawbacks.
この発明はこうした従来例の欠点を解決するためのもの
である。The present invention is intended to solve these drawbacks of the conventional example.
本発明の特徴の一つによれば、絶縁基板上に配線パター
ンを設け、上記配線パターン上に加圧状態で熱融着する
と厚さ方向にのみ導電性となる熱融着用樹脂で被覆して
なる回路基板が提供される。According to one of the features of the present invention, a wiring pattern is provided on an insulating substrate, and the wiring pattern is coated with a heat-sealing resin that becomes conductive only in the thickness direction when heat-sealed under pressure. A circuit board is provided.
つぎにこの発明の実施例について説明する。Next, embodiments of the invention will be described.
第1.2図において、合成樹脂などよりなる絶縁基板1
上に、銅、アルミなどよりなる導電層2が設けられる。In Figure 1.2, an insulating substrate 1 made of synthetic resin, etc.
A conductive layer 2 made of copper, aluminum, etc. is provided thereon.
これは銅箔やアルミ箔を貼ってもよいし、蒸着してもよ
い。つぎKこの導電層2の上に導電性粒子(0+ Ou
、Al、 N1等)を50 Vo1%未満(・好ましく
は5〜10fi)混入した熱融着用樹脂5をパターン印
刷する。この熱融着用樹脂6としては、熱可塑性樹脂(
エチレンポリマー系。This may be done by pasting copper foil or aluminum foil, or by vapor deposition. Next, conductive particles (0+ Ou
, Al, N1, etc.) in an amount of less than 50 Vo1% (preferably 5 to 10 fi) is pattern-printed. As this heat fusion resin 6, a thermoplastic resin (
Ethylene polymer system.
ポリエステル系、ポリアミド系など)または未反応熱硬
化性樹脂(熱変成ナイロン系、エポキシ系など)をベー
ストし、これに粘着付与剤、可塑剤。Polyester, polyamide, etc.) or unreacted thermosetting resin (thermally modified nylon, epoxy, etc.), which is then added with a tackifier and plasticizer.
酸化防止剤等を混合添加した接着剤が用いられる。An adhesive containing an antioxidant or the like is used.
つぎにとの熱融着用樹脂5をレジストとして上記導電層
2をエツチングして配線パターン4を形成する。そして
洗浄、乾燥させて第5.4図示の回路基板5を完成する
。エツチング用に用いる薬品は導電1−2の材料によシ
異なるが、熱融着用樹脂3はこの薬品と反応しないもの
を用いる。また熱融着用樹脂5に混入する導電性粒子に
、導電層2と同じ材料を用いた場合エツチング薬による
影譬が心配されるが、実際には薬品で溶かされる導電性
粒子は表面に出たものだけであり、何ら支障ない。Next, the conductive layer 2 is etched using the heat-sealing resin 5 as a resist to form a wiring pattern 4. Then, the circuit board 5 shown in Figure 5.4 is completed by cleaning and drying. The chemicals used for etching differ depending on the material of the conductors 1-2, but the heat-sealing resin 3 is one that does not react with these chemicals. In addition, if the same material as the conductive layer 2 is used for the conductive particles mixed in the heat-sealing resin 5, there is a concern that the etching agent may cause an effect, but in reality, the conductive particles that are dissolved by the chemical are exposed to the surface. It's just a thing, so there's no problem.
熱融着用樹脂5は回路基板5の完成状態では全方向絶縁
性であるが、電子部品6の端子を加圧状態で加熱融着さ
せ硬化した状態では厚さ方向にのみ導電性となる。その
際溶融状態の樹脂3が横に流れて隣りの配線パターンと
接触しても横方向には絶縁性が保たれるのでショートす
るおそれはない。また完成状態では全方向絶縁性を保っ
ているのでさらに絶縁コーテング等をする必要がない。The heat-sealing resin 5 is insulating in all directions when the circuit board 5 is completed, but becomes conductive only in the thickness direction when the terminals of the electronic component 6 are heated and fused under pressure and cured. At this time, even if the molten resin 3 flows laterally and comes into contact with an adjacent wiring pattern, insulation is maintained in the lateral direction, so there is no risk of short-circuiting. Furthermore, in the completed state, it maintains omnidirectional insulation properties, so there is no need for further insulation coating.
上述の構成よりなる本発明の回路基板によれば電子部品
の接続が半田を使わすに簡単にでき、T、SI などの
半田づけが難しいものでも容易であり、また液晶パネル
のような半田づけができないものでも接続ができる。ま
た横方向でショートすることがなく、さらに、ゴミや他
の配線が樹脂パターン上に触れてもショートするおそれ
がない。According to the circuit board of the present invention having the above-described structure, electronic components can be easily connected using solder, and even difficult-to-solder components such as T and SI can be easily connected. Even things that cannot be connected can be connected. In addition, there is no possibility of short circuits in the lateral direction, and there is no risk of short circuits even if dust or other wiring touches the resin pattern.
また本発明による回路基板の製造方法によれば熱融着用
樹脂をそのままレジストとして用いるのでエツチング後
これを除去する工程が省ける。Furthermore, according to the method of manufacturing a circuit board according to the present invention, the heat-sealing resin is used as it is as a resist, so that the step of removing it after etching can be omitted.
図面は本発明の実施例を示し、第1図は絶縁基板1上に
導電1@2および熱融着用樹脂5を設けた状態の平面図
、第2図は第1図■−■線断面図、第6図は完成した回
路基板の平面図、第4図は第5図■−1V線断面図であ
る。
1・・・絶縁基板、 2・・・導電層、5・・・熱融着
用樹脂、 4・・・配線パターン、5・・・回路基板。
以 上
出願人 株式会社精 工 会
代理人 弁理士 最 上 務
5−
第1図 ■7
L
第2図The drawings show an embodiment of the present invention, and FIG. 1 is a plan view of a state in which a conductor 1@2 and a heat-sealing resin 5 are provided on an insulating substrate 1, and FIG. 2 is a sectional view taken along the line ■-■ in FIG. 1. , FIG. 6 is a plan view of the completed circuit board, and FIG. 4 is a sectional view taken along line 1-1V in FIG. 5. DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2... Conductive layer, 5... Heat sealing resin, 4... Wiring pattern, 5... Circuit board. Applicant Seikokai Co., Ltd. Agent Patent Attorney Mogami 5- Figure 1 ■7 L Figure 2
Claims (2)
ターン上に加圧状態で熱融着すると厚さ方向にのみ導電
性となる熱融着用樹脂で被覆してなる回路基板。(1) A circuit board formed by providing a wiring pattern on an insulating substrate and covering the wiring pattern with a heat-sealing resin that becomes conductive only in the thickness direction when heat-sealed under pressure.
加圧状態で熱融着すると厚さ方向にのみ導電性となる熱
融着用樹脂でパターン印刷をし、上記熱融着用樹脂をレ
ジストとして上記溝t1@をエツチングして配線パター
ンを形成することを特徴とする回路基板の製造方法。(2) A conductive layer is formed on an insulating substrate, and a pattern is printed on the conductive layer with a heat-sealing resin that becomes conductive only in the thickness direction when heat-sealed under pressure. A method for manufacturing a circuit board, characterized in that a wiring pattern is formed by etching the groove t1@ using a resin as a resist.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24119383A JPS60133789A (en) | 1983-12-21 | 1983-12-21 | Circuit board and method of producing same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24119383A JPS60133789A (en) | 1983-12-21 | 1983-12-21 | Circuit board and method of producing same |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60133789A true JPS60133789A (en) | 1985-07-16 |
Family
ID=17070594
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24119383A Pending JPS60133789A (en) | 1983-12-21 | 1983-12-21 | Circuit board and method of producing same |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60133789A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0354567A (en) * | 1989-07-21 | 1991-03-08 | Toyo Ink Mfg Co Ltd | Film type resist and formation of resist |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5654091A (en) * | 1979-10-09 | 1981-05-13 | Suwa Seikosha Kk | Electric circuit unit |
JPS5818993A (en) * | 1981-07-27 | 1983-02-03 | 日本黒鉛工業株式会社 | Method of producing contact terminal with heat seal connector on printed circuit board |
JPS58115885A (en) * | 1981-12-28 | 1983-07-09 | シャープ株式会社 | Method of producing circuit board |
-
1983
- 1983-12-21 JP JP24119383A patent/JPS60133789A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5654091A (en) * | 1979-10-09 | 1981-05-13 | Suwa Seikosha Kk | Electric circuit unit |
JPS5818993A (en) * | 1981-07-27 | 1983-02-03 | 日本黒鉛工業株式会社 | Method of producing contact terminal with heat seal connector on printed circuit board |
JPS58115885A (en) * | 1981-12-28 | 1983-07-09 | シャープ株式会社 | Method of producing circuit board |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0354567A (en) * | 1989-07-21 | 1991-03-08 | Toyo Ink Mfg Co Ltd | Film type resist and formation of resist |
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