JPS60130946A - Synchronous communication controller - Google Patents

Abstract

PURPOSE:To transmit continuously a signal block subjected to packet conversion at each synchronism of sunchronizing communication by providing a transmission buffer storing signal blocks for synchronizing communication. CONSTITUTION:A buffer area storing a signal block is assigned to a transmission buffer at each synchronizng communication terminal. Each synchronizing communication terminal device writes the signal block to each buffer area of the transmission buffer periodically after the end of call setting. A synchronizing communication control section 15 writes transmission control information of the signal block to be transmitted, inputted from a terminal 10 and stored in th transmission buffer to one of memories 16, 21. A transmission control section selected by a selector 26 is brought into the control operating state and the other transmission control section is brought into the stand-by state.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a synchronous communication system that continuously transmits signal blocks for synchronous communication and controls the transmission order of signal 7'' lock when a call is originated or terminated. Regarding control device K.

Synchronous communication such as audio and video, data terminal and host? A packet communication method is used as a communication method to integrate asynchronous communication between computers and other computers. For example, in the paper ``High-speed synchronous packet loop capable of integrating image communications'' written in the 1981 IEICE Information and Systems Division Conference Proceedings Lecture No. 381K, the sending bucket)K
Priority levels are set, signal blocks for synchronous communication are packetized, a high priority level is given to the signal blocks, a low priority level is given to packets for asynchronous communication, and both communications are combined.

This synchronous packet loop constitutes a loop network as shown in FIG. 1 in Figure 1 is the synchronization signal SYN
2.3.4.5゜6 in the same figure respectively accommodate a synchronous communication terminal and an asynchronous communication terminal, Each stage is connected by a transmission line 9. Furthermore, 7-1 to 7-n in the same figure indicate the synchronous terminals 8-1 to s- that are accommodated by the node stages.
Similarly, m indicates an asynchronous terminal. The synchronization signal SYN is the second
As shown in the figure, it is sent to the loop every synchronization T, gives a time origin to each node stage, and starts the transmission of a packet (PKT) for synchronization communication with the highest priority level. -Cyclic synchronization signal 8Y
After removing N from the loop and passing all the buckets (PKT) for synchronous communication from each node stage, it sends out a poll link signal POL 1 that activates communication at the next priority level. Thereafter, polling signals are supplied in the same manner in the order of their priority level being low. This polling signal is sent repeatedly during synchronization T, but in the next cycle, synchronization signals S and YN are supplied. synchronous communication with the highest priority level is started again.

If there is a transmission request corresponding to the priority level given by the synchronization signal SYN and the polling signal, the packet (PKT) 4 on the loop containing these signals is sent.
! It constantly monitors the passage of signals and immediately transmits when it detects an idle state. Packets for synchronous communication must be sent consecutively every cycle T from call origination to call termination, but packets that are transmitted when another synchronous terminal originates or terminates a call. Since the number and order of packets change, it becomes necessary to re-establish the transmission order, and during this period, packet transmission is stopped and synchronization cannot be maintained.

An object of the present invention is to continuously transmit packetized signal blocks for synchronous communication in each cycle of synchronous communication when synchronous communication and asynchronous communication are integrated in a packet communication system, and to Synchronous communication that allows transmission to continue without interfering with communications prior to call origination or termination even if a synchronous communication call is initiated or terminated and the signal 7 lock is sent (Ff order is changed) There is also a need to provide a communication control device.

According to the present invention, there is provided a transmission buffer for accumulating signal blocks for synchronous communication, transmission control information regarding the signal block for which call setup has been performed, and a user can store signal blocks in the transmission buffer based on the transmission control information. It controls the transmission of the accumulated signal blocks and includes 52 control units, a synchronous communication control unit that controls these two transmission control units, and a transmission line access that sends out the signal block to the transmission line. The synchronous communication control section sets one of the two transmission control sections to an operating state for controlling the transmission buffer, puts the other one in a standby state, and performs 91, a call, or , When a call is terminated, new transmission control information is set in the transmission control unit in the standby state in response to this, and after the setting is completed, the transmission control unit in the standby state is changed to the operating state N.
There is obtained a synchronous communication control device characterized in that it has a function of placing the other transmission control unit, which was in an operating state before setting KL, into a standby state.

Next, a synchronous communication control device according to the present invention will be explained with reference to the drawings. FIG. 3 is a block diagram showing the configuration of the first embodiment of the synchronous communication control device of the present invention. This synchronous communication control device includes a switch 11 and an access control section 12. Transmission register 13. A transmission line access control section consisting of a reception register 14, a synchronous communication control section 15, and a transmission control memory 16. A transmission control section consisting of an address counter 17, 18, a block length counter 19, an end detection circuit 20, and a transmission control memory 21 having the same configuration as this.
, address counters 22, 23, block length counter 2
4. It is composed of another transmission control section consisting of an end detection circuit 25, and a transmission buffer section consisting of a selector 26 and a transmission buffer 27.

Further, the transmission line access control section is connected to the transmission line 9.

4(a) and 4(b) show the signal blocks in the transmission buffer 27 in FIG. 3 and the transmission control information in the transmission control memory 16.21.

A first example will be described. Now, for n synchronous communication terminals accommodated by one node station, a buffer area for storing a signal block for each synchronous communication terminal is allocated in the transmission buffer 27 as shown in Fig. 4 (ta). After the call setup is completed, each synchronous communication terminal writes a signal block to each buffer area in the transmission buffer 27 every cycle of synchronous communication. In parallel with this, the synchronous communication control unit 15 receives the input from the terminal 10 and sends it to the transmission buffer 2.
The transmission control information of the signal block to be transmitted, that is, the start address and block length stored in 7, is written into either one of the transmission control memories 16 and 21 as shown in FIG. 4(b). A code indicating the end of transmission, END ''', is subsequently added to the transmission control information of the signal block.Furthermore, the transmission control section that has finished writing the transmission control information notifies the selector 26 to control the transmission buffer section. Therefore, the transmission control section selected by the selector 26 is in a control operation state, and the other transmission control section is in a standby state.

For example, 7-1.7-2.7 out of n synchronous communication terminals.
-4 during communication, each signal block is written in the transmission buffer 27 as shown by the hatched area in FIG. 716, as shown in FIG.
．． a2Ila4° and block length t i , tz%t4
is written. When the above transmission preparations are completed and the access control s12 receives the synchronization signal SYN on the transmission path, detects the idle state of the transmission path and acquires the transmitter, it flips the switch 11 to the transmission V raster 13 side and enters the transmission mode. At the same time as the transition, the synchronous communication control unit 15 is instructed to send out a signal flock for synchronous communication.

Based on this command, the synchronous communication control unit 15 resets the address counter, for example, the address counter 17, of the transmission control unit in the control operation state, and causes the synchronous communication terminal 7-1 to transmit first from the first address of the transmission control memory 16. 1 is placed in the start 7 address a11 of the signal block, and this is set in the address counter 1B. Next, the address counter 17 is incremented by 1, the 7p block length t1 is taken out, and this is set in the block length counter 19, and this is set in the address counter 1B. Prepare. The signal booter to be transmitted is read out from the transmission buffer 27 by reading out the address indicated by the empty register 18 on the 7th floor, and sent to the transmission line 9 via the transmission register 13. Then, in response to one reading of the transmission buffer 27, the value of the address counter 18 is incremented by 1, and the value of the block length counter 19 is subtracted by 1. When this operation is repeated and the value of the block length counter 19 becomes zero, the transmission of one signal block is completed, the value of the address counter 17 is incremented by 1, and the next terminal 7 transmits. -2 transmission control information, that is, the start address 2 and block length L2 are set in the address counter 17 and block length counter 19, respectively, and transmission continues.

When the transmission of the signal block from the terminal 1-4 is completed, the next communication control information E and the end code "END" are read out from the transmission control memory 16. The end detection circuit 20 is
When this “-END” is detected, the synchronous communication control unit 1
Communicate to 5. Based on this communication, the synchronous communication control unit 15
connects the switch 11 to the transmission path 9 side and ends the transmission.

Note that if the signal block lengths of each synchronous communication are the same, the memory area of the transmission buffer 27 is equally divided by the block length, and there is no need to store the block length in the transmission control memo jJ16.21.

Next, a change in the transmission order of signal blocks when a synchronous communication call is initiated or terminated in the first embodiment will be described with reference to FIGS. 3 and 5. When a call is originated or terminated, the synchronous communication control unit 15 stores transmission control information in the transmission control memory 21 of the transmission control unit in a standby state in response to the call origination or termination. When the setting is completed and the transmission within a certain period of synchronous communication is completed, the transmission control section which is in the standby state is put into the control operation state, and the transmission control section which was in the control operation state before the setting is put into the standby state. For example, in the example of Fig. 5, terminal 7-1.7-2
．． 7-4 is in communication, terminal 7-3 makes a new call, and terminal 7-2 terminates the call, the waiting transmission control unit and transmission control memory 21 contain the information shown in FIG. 5(e). After setting the transmission control information as shown in K and completing the transmission of each signal block of the terminals 7-1.7-2.7-4, the selector 26 switches the transmission control section. From the next cycle, based on the transmission control of the transmission control section that has become operational after this switching K,
Terminal 7-1.7-3. ? -4 signal blocks are transmitted. In this case, switching control for the selector 26 is performed in an extremely short time compared to rewriting the transmission control information in the transmission control memory 16 or 21, so even if the transmission order of signal blocks is changed due to call origination or termination, Can be sent smoothly.

Figure #g6 is a diagram showing the second embodiment of the present invention.

The biggest difference from the actual example of vgl is that the transmission control memories 16 and 21 in FIG. 3 are integrated. Exchange 1
Then, the transmission control memory 16.21 is changed to the transmission control memory 16' having a storage capacity corresponding to the sum of the respective storage capacities.
This is a replacement for Kttt.

Accordingly, in the first example, selector address counters 18, 23, . Block length counter 19.2
4. End detection circuit 20.25.7 Dress counter 17.
Only one of each component 22 is required, and the selector 26 is not required. That is, as already mentioned, two transmission control sections are essential in the present invention, but by implementing the design measures described above, it is possible to change the device configuration by apparently using only one transmission control section. The second embodiment is a simplified version.

The synchronous communication control device shown in FIG. 6 includes a transmission path access control section consisting of a switch 11, an access control circuit 12, a transmission register 13, a reception register 14, a synchronous communication control section 15, a transmission control memory 16', an address counter 17', 1B
, a block length counter 19, an end detection circuit 20, and a transmission buffer 27.

Further, the transmission line access section is connected to the transmission line 9. The transmission control memory 16 in FIG. Either one of the transmission control information is selected depending on the MOB setting value of the counter 17/. 7th
The figure shows a specific example of the transmission control memory 16' in FIG.

For example, when the synchronous communication terminal 7-1.7-2.7-4 is on a call, it sets the MSB of the address counter 17' to OK, transmits each signal block, and the terminal 7-3 makes a call. When the terminal 7-2 terminates the call, the synchronous communication control unit 15 sets new transmission control information in the area where MOB is 1 in the transmission control memory 16', and after the setting, the synchronous communication control unit 15 sets the transmission control information in the area where MOB is 1, and after the setting, the synchronous communication control unit 15 When the transmission of 4 is completed, the address counter 17' MSH
Set the value of 0 to IK stage and continue transmission based on the new transmission control information.

As is clear from the above description, according to the present invention, it is possible to continuously transmit signal flocks for synchronous communication to a shelf that integrates the packet communication method every cycle of synchronous communication. Even if a synchronous communication call is initiated or terminated, the transmission order of the signal blocks to be transmitted can be changed without interfering with other transmissions, which is useful for integrating synchronous and asynchronous communication. The benefits are significant.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration of synchronous packet loose, where 1 is a trigger station, 2 to 6 are node stages, and 7-1 to ? -n is a synchronous terminal, 8-1 to Bm are asynchronous terminals, and 9 is a transmission path. FIG. 2 is a diagram showing the flow of signals on a synchronous packet loop. FIG. 3 is a diagram showing a first embodiment of a synchronous communication control device according to the present invention, and FIG. 6 is a diagram showing a second embodiment. #!
3 and 6, 11 is a switch, 12 is an access control section, 13 is a transmission register, 14 is a reception register, 15 is a synchronous communication control section, 16.16. '21 is the transmission control memory, 17°17, '18, 22.23 is the 7 address counter, 19.24 is the block length counter, 20
．． 25 is an end detection circuit, 26 is a selector, 27 is a transmission buffer, and 9 is a transmission path. Also, Fig. 4 (a), (b)
) are diagrams showing signal blocks in the transmission buffer 27 of FIG. 3, diagrams for explaining transmission control information in the transmission control memory 16.21, and FIG. 5 shows a specific example of FIG. 4,
(a) shows the transmission buffer 27 (b), and (e) shows the transmission control memory 16.21. Furthermore, FIG. 7 shows a specific example of the transmission control information in the transmission control memory 16' in FIG. Infant 1 N character 2 l 9 ≦ 17 /S Zt' (a) (b) Tei 5 Mouth (a) (b) (c)

Claims (1)

[Claims] It has a transmission buffer for accumulating signal locks for synchronous communication, and transmission control information regarding signal blocks for which call setup has been performed, and performs transmission control of the signal blocks accumulated in the transmission buffer based on the transmission control information. 52 transmission control units, and also includes a synchronous communication control unit that controls these two transmission control units and a transmission line access control unit that sends out a signal block to the transmission line, and the synchronous communication control unit is configured to control the two transmission control units. One of the two transmission control units is set to an operating state for controlling the transmission buffer, the other is set to a standby state, and when a call is originated or terminated, the transmission state of the standby state is The function is to newly set the transmission control information in the transmission control section, and after the setting is completed, to put the transmission 111118 section in the standby state into the operating state, and to put the other transmission control section, which was in the operating state @JIC before the setting, into the standby state. A synchronous communication control device comprising: