JPS60130638U - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS60130638U
JPS60130638U JP1984017943U JP1794384U JPS60130638U JP S60130638 U JPS60130638 U JP S60130638U JP 1984017943 U JP1984017943 U JP 1984017943U JP 1794384 U JP1794384 U JP 1794384U JP S60130638 U JPS60130638 U JP S60130638U
Authority
JP
Japan
Prior art keywords
semiconductor equipment
metal substrate
semiconductor element
semiconductor
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984017943U
Other languages
English (en)
Inventor
西本 孝三
上田 健司
嘉彦 中島
越智 正人
Original Assignee
株式会社 三社電機製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社 三社電機製作所 filed Critical 株式会社 三社電機製作所
Priority to JP1984017943U priority Critical patent/JPS60130638U/ja
Publication of JPS60130638U publication Critical patent/JPS60130638U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
    • H01L2224/26152Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/26175Flow barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第1゛図は従来の半導体装置主要部の縦断面図、第2図
および第3図は別の従来の半導体装置主要部の縦断面図
、第4図はこの考案による半導体装置の縦断面図である
。 1・・・・・・金属基板、2・・・・・・半導体素子、
3・・・・・・ハンダ、4d・・・・・・塗装。

Claims (1)

    【実用新案登録請求の範囲】
  1. 金属基板の上面に半導体素子をハンダ付けにより取付け
    、前記半導体素子の外周縁部近傍の前記金属基板上に、
    前記ハンダ広がり防止用の塗装を施したことを特徴とす
    る半導体装置。
JP1984017943U 1984-02-10 1984-02-10 半導体装置 Pending JPS60130638U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984017943U JPS60130638U (ja) 1984-02-10 1984-02-10 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984017943U JPS60130638U (ja) 1984-02-10 1984-02-10 半導体装置

Publications (1)

Publication Number Publication Date
JPS60130638U true JPS60130638U (ja) 1985-09-02

Family

ID=30506117

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984017943U Pending JPS60130638U (ja) 1984-02-10 1984-02-10 半導体装置

Country Status (1)

Country Link
JP (1) JPS60130638U (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS546068B2 (ja) * 1975-04-03 1979-03-24

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS546068B2 (ja) * 1975-04-03 1979-03-24

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