JPS60130153A - Semiconductor ic device - Google Patents

Abstract

PURPOSE:To make a microcomputer rapidly cope with customization by a method wherein, in arranging connection pads on a microcomputer IC chip, two rows or more of connection pads are provided along at least a side of the chip, thus making the pad row used at the time of evaluation different from that at the time of general use. CONSTITUTION:In arranging the connection pads on the microcomputer IC chip, two rows of connection pads are provided on both sides in X direction. The connection pads 17 in the outer row of them are designated for the input-output connection ends of a program ROM, and the connection pads 18 in the inner rows and the connection pads 19 in Y direction are used for general purpose. While the number of processes is thus reduced, the connection pads of a one-chip microcomputer chip and an evaluation chip are systemized; accordingly, the microcomputer capable of rapid coping with customization is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a semiconductor integrated circuit device (IC), and more particularly to a connection pad arrangement of an IC chip for a microcomputer.

fbl Prior Art and Problems Recently, microcomputers have made remarkable advances, and their development is on track to surpass even large computers. Semiconductor devices are the basis of this development, and the high integration of semiconductor devices is due to
There is no end to C, LSI, VLSI.

In the field of microcontrollers, a one-chip microcomputer (one-chip microcomputer) was developed that had all combinator functions in a solid IC.
・It is becoming increasingly sophisticated, making it possible to perform complex processing. In this way, the one-chip microcomputer IC has all the functions of a computer, such as programming, control, and arithmetic, in one IC (chip), making it extremely compact.

Figure 1 shows an overview of the block diagram of a one-chip microcomputer, whose main functions are accessing the address of the program ROM 2 from the program counter 1, and
Data is output from the program ROM 2 to the PLA (Instruction Programmable Loss Array) 3, and the I P 1. ,, RAM by the control signal of A3
4. Arithmetic unit 5. It is processed by operating Renostar 6 or the like.

By the way, in such a microcomputer, the program ROM 2 provided in the microcomputer semiconductor Sennobu (Micon Tip) is a mask ROM (ROM: read-only memory) designed by the manufacturer according to the user's specifications. They are created in different memories depending on the specifications, but the program counter 1. I
PLA3°RAM4. Arithmetic unit 5. Other circuits such as register 6 are unchangeable circuit parts designed in advance by the manufacturer,
It is not changed according to the user's specifications.

On the other hand, when creating a program to be built into an IC circuit, the first created program ROM usually has many errors, and the correct one is created after multiple de-processing steps. In the one-chip microcontroller mentioned above, if the program written in the mask ROM is incorrect,
It's a program ROM section for one chip, not &J.
Everything needs to be rebuilt from scratch, including other unchangeable circuits.

However, this is extremely wasteful.

Therefore, in order to avoid this and speed up production of microcontrollers, in addition to microcontroller chips for supply, we create a chip for program inspection called an ehariration chip. In addition to the ROM, a chip with an external memory interface circuit added thereto, in other words, an external program ROM is required. In this way, various types of one-chip microcomputer chips are generally created with their own unique chips, and de-hassocks are performed using such ehalation chips.

However, although the Eharition Denop has an unchanging circuit inside, due to the connection with the mask ROM,
The number of connection pads (wire bonding pads) around the chip increases compared to the number of connection pads on the microcomputer chip, and the number and arrangement of the connection pads must be changed depending on the mask ROM.

At that time, the number of terminals on the one-chip microcontroller was 42.

48, and recently 64 and 80. Since the number has become extremely large, changing it from a design perspective is a problem that requires a lot of man-hours.

(C) Purpose of the Invention The present invention proposes a microcomputer that can reduce such man-hours, systematize the connection pads between the one-chip microcomputer chip and the ehalation tip, and quickly respond to made-to-order production.

(dl Structure of the Invention The purpose of the invention is to provide a semiconductor integrated circuit in which two or more rows of connection bands are provided along at least one side of a semiconductor chip, and the rows of pads used only for evaluation are different from the rows of pads used for general use. This can be achieved by a device.

(el　Embodiments of the invention An embodiment will be described in detail below with reference to one drawing.

Figure 2 is an example of the outline drawing of a microcomputer IC containing a one-chip microcomputer chip.
It is contained in 1. FIG. 3 is an example of an external view of a microcomputer IC containing an variation chip, in which another semiconductor container 13 is placed on top of a main semiconductor container 12. The semiconductor container 13 contains EPR.
Contains OM (erasable ROM) and EPROM
A program is written in the semiconductor container 12, and the variation chip is housed in the semiconductor container 12. still,
13W indicates a light irradiation window.

Next, FIG. 4 shows a plan view of a one-chip microcomputer chip housed in the semiconductor container 11, in which connection pads 14 are formed in a row around the four peripheries.

A one-chip microcontroller has power, clock, and input.

Connection bands, which serve as connection ends for outputs, etc., are arranged in consideration of the arrangement on the chip and the lead terminals of the semiconductor container.

Next, FIG. 5 shows a plan view of a conventional evaporation chip for producing such a microcomputer chip. Reference numeral 15 denotes connection pads, and as shown in the figure, the microcomputer chip shown in FIG. 4 has a structure in which a connection band 16 for ROM input/output connection is added, and connection pads are arranged in a row. As a result, the chip becomes larger and the spacing between the connection pads is reduced, but the most important point is that the number of design steps increases as described above. That is, the arrangement of the connection pads must be re-examined according to the user's specifications.

Accordingly, the present invention proposes an ehalation system C as shown in FIG. 6, for example. In this embodiment, two rows of connection pads are provided on both sides in the X direction, and the connection pads 17 in the external row are connected to the input/output connection ends for the program ROM, that is, the address end (input end) accessed from the program counter and the ROM. It is limited to the instruction end (output end) that outputs program data from to the IPLA. The number of connection pads I7 is, for example, 4 for the address end and 12 for the memory, and 8 bits for the instruction end for 8 bands.

On the other hand, the connection pads 18 in the inner row and the connection pads I9 in the Y direction are arranged in the same manner as before, and the connection pads between the one-chip microcomputer chip and the elation chip (see FIG. 4) are arranged in the same manner. . If you do this,
By eliminating the connection pads 17 on the external rows of the chip, it is possible to select either a one-chip microcomputer chip or an elution chip.

The above is an example, but if the connection bands provided on the variation chip are arranged in a double arrangement and one is limited to the input/output connection end to the program ROM (either the internal row or the external row is fine), the design becomes easier and reduces man-hours. In addition, it is possible to downsize the ehalation chisop.

Next, FIG. 7 shows a cross-sectional view of the semiconductor container 12 in which such an variation tinop C is housed in the semiconductor container, and 20 is a bonding wire that connects the connection pad and the connection terminal of the container; 2 is a wiring inside the package, and 22 is a ROM connection band. In this example, the connection terminal positions of the semiconductor container are formed in two stages, which is suitable for a semiconductor container for storing a chip according to the present invention. However, this does not necessarily have to be the case with semiconductor containers having two levels of terminal positions, but if the external row of connection pads 17 are provided between the internal row of connection pads 18 on the chip side, the conventional connection terminals can be It can also be bonded and housed in a single-stage semiconductor container.

Further, FIG. 8 shows a sectional view of a semiconductor device in which the etching chip C inspected in this way is housed in a semiconductor container 14 for mass production.

if) Effects of the Invention As is clear from the above description of the embodiments, according to the present invention, c for microcomputers has the great effect of reducing the number of man-hours, making it cheaper, and being able to quickly supply it to users. .

[Brief explanation of drawings]

Figure 1 is a schematic diagram of block die 4/Durham of a microcontroller, Figure 2 is an outline diagram of a one-chip microcontroller, Figure 3 is an outline diagram of a microcontroller that accommodates variation chips for evaluating the microcontroller shown in Figure 2, and Figure 4 The figure is a plan view of the microcomputer chip.
FIG. 5 is a plan view of a conventional evariation chip for evaluating the microcomputer chip shown in FIG.
The figure is an example of a cross-sectional view of a semiconductor container to which an elongation chisel according to the present invention is attached, and FIG. 8 is a cross-sectional view of a semiconductor device in which the elation chimney is attached to a semiconductor container for mass production. In the figure, 2ba program ROM, LL 12.13.3
1 is a semiconductor container, 14, 15, 18, 19 is a connection pad, 16° 17 is a connection bat' for a program ROM, 20 is a bonding wire, and 21 is a wiring inside the pan cage. 22 is a ROM connection pad, and C is an variation chip. Figure 1 Figure 2 Figure 3 Figure 4 Figure 4 Figure 5

Claims (1)

[Claims] 2 connecting bands along at least one side of the semiconductor chip.
What is claimed is: 1. A semiconductor integrated circuit device, characterized in that more than one row of pads are provided, and the rows of pads used only during evaluation are different from the rows of bands used for general use.