JPS60129157U - Substrate for hybrid integrated circuits - Google Patents
Substrate for hybrid integrated circuitsInfo
- Publication number
- JPS60129157U JPS60129157U JP1641084U JP1641084U JPS60129157U JP S60129157 U JPS60129157 U JP S60129157U JP 1641084 U JP1641084 U JP 1641084U JP 1641084 U JP1641084 U JP 1641084U JP S60129157 U JPS60129157 U JP S60129157U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- hybrid integrated
- electrode
- integrated circuit
- integrated circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の混成集積回路を示す概略平面図、第２図
はその製品図、第３図は本考案にシる一実施例の混成集
積回路用基板の概略平面図、第４図ａは基板ｉこ取付−
るチップ！手の一例である呻膜抵抗チップの概略斜視図
、同、図すはその概略゛平面図、第５図は本考案の基板
を用いての内部接続を示す部分拡大図、第６図は本考案
の基板を用いた鴨明薗、第８図、第１０図は第７図及び
□第９図は抵抗回路に対応した混成集積回路の内部構成
図である。
図中、」は絶縁基板（混成集積回路用基板）、 ・２は
外部電竺及び導体、２ａはチツて部品取付用 １、電極
、２ｂ＊ ２ｃ、２ｄは接続用導体、３は抵抗体”、３
ａは薄膜チップ抵抗、４はチップコンデン 。
す、４ａ−は薄膜チップコンデンサ、５は外部端 ′
子、６はモポキシ樹脂、７は極細金属線である。
なお、図中同一あるいは相当部分には同一符号を′１°
′″Ｌ”？＄６． 、− 。
補正 昭５９．６．２１
図面の簡単な説明Fig. 1 is a schematic plan view showing a conventional hybrid integrated circuit, Fig. 2 is a product diagram thereof, Fig. 3 is a schematic plan view of a hybrid integrated circuit board according to an embodiment of the present invention, and Fig. 4 a. The board I is installed.
Chip! A schematic perspective view of a membrane resistor chip, which is an example of a hand, is a schematic plan view thereof, FIG. 5 is a partially enlarged view showing internal connections using the substrate of the present invention, and FIG. 8 and 10 are internal configuration diagrams of a hybrid integrated circuit corresponding to a resistor circuit. In the figure, "" is an insulating substrate (substrate for hybrid integrated circuit), 2 is an external wire and conductor, 2a is for mounting parts, 1 is an electrode, 2b* 2c and 2d are connecting conductors, 3 is a resistor. ,3
a is a thin film chip resistor, 4 is a chip capacitor. 4a- is a thin film chip capacitor, 5 is an external end ′
6 is a mopoxy resin, and 7 is an ultra-fine metal wire. In addition, the same reference numerals are used for the same or corresponding parts in the figures.
′′L”? $6. ,−. Correction June 21, 1982 Brief explanation of the drawings
Claims (1)
品を搭載する混成集積回路の前記基板上１こチップ素子
用電極と、外部端子取付用電極と、所要の形状をなす複
数の接続用導体とを形成し、上記チップ素子電極と前記
接□続用導体間、前記二つの電極間、前記導体と前記取
付用電極間、及ｄ前記導体相互間をそれぞれ極細金属線
を用゛いて接続し、回路構成を行うことを特徴とする混
成集積回路用基板。In a hybrid integrated circuit in which components are mounted on an insulating substrate such as a ceramic substrate or a resin laminated substrate, an electrode for one chip element, an electrode for attaching an external terminal, and a plurality of connection conductors having a desired shape are provided on the substrate. The chip element electrode and the connecting conductor, between the two electrodes, between the conductor and the mounting electrode, and between the conductors are connected using ultrafine metal wires to form a circuit. A board for a hybrid integrated circuit characterized by performing configuration.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1641084U JPS60129157U (en) | 1984-02-08 | 1984-02-08 | Substrate for hybrid integrated circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1641084U JPS60129157U (en) | 1984-02-08 | 1984-02-08 | Substrate for hybrid integrated circuits |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60129157U true JPS60129157U (en) | 1985-08-30 |
Family
ID=30503154
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1641084U Pending JPS60129157U (en) | 1984-02-08 | 1984-02-08 | Substrate for hybrid integrated circuits |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60129157U (en) |
-
1984
- 1984-02-08 JP JP1641084U patent/JPS60129157U/en active Pending
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