JPS60119791A - Method of producing smoothing circuit board - Google Patents
Method of producing smoothing circuit boardInfo
- Publication number
- JPS60119791A JPS60119791A JP22757983A JP22757983A JPS60119791A JP S60119791 A JPS60119791 A JP S60119791A JP 22757983 A JP22757983 A JP 22757983A JP 22757983 A JP22757983 A JP 22757983A JP S60119791 A JPS60119791 A JP S60119791A
- Authority
- JP
- Japan
- Prior art keywords
- original plate
- conductive substrate
- substrate
- circuit board
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 25
- 238000009499 grossing Methods 0.000 title description 2
- 239000000758 substrate Substances 0.000 claims description 46
- 238000007747 plating Methods 0.000 claims description 24
- 238000004519 manufacturing process Methods 0.000 claims description 21
- 239000004020 conductor Substances 0.000 claims description 16
- 239000012212 insulator Substances 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 2
- 238000007254 oxidation reaction Methods 0.000 claims description 2
- 238000005498 polishing Methods 0.000 claims description 2
- 230000002265 prevention Effects 0.000 claims description 2
- 230000001590 oxidative effect Effects 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 11
- 239000000463 material Substances 0.000 description 5
- 238000012546 transfer Methods 0.000 description 5
- 238000007731 hot pressing Methods 0.000 description 4
- 239000011810 insulating material Substances 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
Landscapes
- Manufacturing Of Printed Wiring (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明は絶縁材料より成る基板の表面に所定のパターン
の導体を埋込んで平滑な表面とした平滑回路板を製造す
る方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a smooth circuit board by embedding a predetermined pattern of conductors into the surface of a substrate made of an insulating material to provide a smooth surface.
このような平滑回路板は、例えば摺動スイッチ、、エン
コーダ等に用いられており、摺動子が回路板１上を平滑
に摺動できるように、絶縁基板と導体の表面とを精密に
同一平面とすることが重要である。Such smooth circuit boards are used, for example, in sliding switches, encoders, etc., and the surfaces of the insulating substrate and the conductor are precisely aligned so that the slider can slide smoothly on the circuit board 1. It is important that it be flat.
このような平滑回路板を製造する方法としては従来から
種々の方法が知られているおり、例えば特開昭５１−４
５７４号公報、同５６−１３５９９８号公報に記載され
ている。特開昭５１−４５７４号公報に記載された方法
では、金属板上に所望の導体パターンのネガパターンを
有するレジスト膜を印刷した後、メッキを施し、この金
属板の表面を絶縁基板に圧着してホットプレスを行なっ
てメッキ膜より成る導体パターンを絶縁基板に転写した
後、金属板を絶縁基板から剥離するようにしている。ま
た、特開昭５６−１３５９９８号公報には、金属板に、
表面絶縁層として作用するレジスト膜を印刷により形成
した後、メッキ処理を施し、金属板表面に絶縁基板とな
るプリプレグを積層した後、ホットプレスによりメッキ
膜より成る導体パターンをプリプレグへ転写した後、金
属板をプリプレグから剥離する方法が記載されている。Various methods have been known for manufacturing such smooth circuit boards, for example, as disclosed in Japanese Patent Application Laid-Open No. 51-4
It is described in No. 574 and No. 56-135998. In the method described in JP-A No. 51-4574, a resist film having a negative pattern of a desired conductor pattern is printed on a metal plate, plating is applied, and the surface of this metal plate is crimped to an insulating substrate. After hot pressing is performed to transfer the conductor pattern made of the plating film onto the insulating substrate, the metal plate is peeled off from the insulating substrate. In addition, Japanese Patent Application Laid-open No. 56-135998 discloses that on a metal plate,
After forming a resist film that acts as a surface insulating layer by printing, plating it, laminating a prepreg that will become an insulating substrate on the surface of the metal plate, and then transferring a conductive pattern made of the plating film to the prepreg by hot pressing, A method for peeling a metal plate from a prepreg is described.
・このような従来の方法では、レジスト膜を印刷に１よ
り形成しているため、微細なパターンを形成することが
できない欠点がある。すなわち、印刷法では幅数百ミク
ロン以下のレジスト膜パターンを形成することは困難で
ある。さらにパターンのう・・インエツジの鮮明さの制
御が難しい欠点もある。- In such conventional methods, since the resist film is formed by printing, there is a drawback that fine patterns cannot be formed. That is, it is difficult to form a resist film pattern with a width of several hundred microns or less using the printing method. Another drawback is that it is difficult to control the sharpness of the pattern edges.
このような欠点を除去するものとして、第１図Ａに示す
金属板ｌの表面に第１図Ｂに示すように感光性樹脂より
成るレジスト膜２を一様に被着した後、所望の導体パタ
ーンに対応して露光、現像を行なって第１図Ｏに示すよ
うに導体パターンに対応する部分に窓２ａを形成し、次
にメッキ処理を施して第１図りに示すように窓２ａ内に
メッキ膜８を形成し、第１図Ｅに示すように残存するレ
ジスト膜２を除去した後、第１図Ｆに示すようにホット
プレスを行なって絶縁基板４の表面にメッキ膜３を転写
し、最後に第１図Ｇに示すように金属板１を絶縁基板４
から剥離して平滑回路板５を形成する方法が提案されて
いる。或はまた、このような方法の変形例として、金属
板上に最初にメ・ツキ層を形成した後、メッキ層上に感
光性樹脂なｌどより成るレジスト膜を被着し、これを所
望の導体パターンに応じて露光、現像して導体ノぜター
ンに相当する部分にだけレジスト膜を残在させ、次にエ
ツチング処理によりメッキ層を部分的に除去し、さらに
レジスト膜を除去した後、絶縁基板にメッキ層より成る
導体パターンを転写した後金属板を絶縁基板から剥離す
る方法も知られている。In order to eliminate such defects, a resist film 2 made of a photosensitive resin is uniformly deposited on the surface of the metal plate l shown in FIG. 1A, as shown in FIG. 1B, and then a desired conductor is formed. Exposure and development are performed in accordance with the pattern to form a window 2a in a portion corresponding to the conductor pattern as shown in Figure 1 O, and then plating is performed to form a window 2a in the window 2a as shown in Figure 1. After forming the plating film 8 and removing the remaining resist film 2 as shown in FIG. 1E, hot pressing is performed to transfer the plating film 3 onto the surface of the insulating substrate 4 as shown in FIG. 1F. , Finally, as shown in FIG. 1G, the metal plate 1 is attached to the insulating substrate 4.
A method has been proposed in which the smooth circuit board 5 is formed by peeling from the substrate. Alternatively, as a modification of such a method, after first forming a plating layer on a metal plate, a resist film made of photosensitive resin or the like is deposited on the plating layer, and this is coated as desired. After exposing and developing the resist film according to the conductor pattern to leave a resist film only in the portion corresponding to the conductor nozzle, the plating layer is partially removed by etching treatment, and the resist film is further removed. A method is also known in which a conductor pattern made of a plating layer is transferred to an insulating substrate and then the metal plate is peeled from the insulating substrate.
このような従来の方法では、導体パターンを形成する大
めのレジスト膜のパターニングを平滑回路板を製造する
度に行なっているが、このパターニングによって導体パ
ターンの寸法精度が決まるので相当な注意を払う必要が
あり、製造工程が面倒となり、能率が悪い欠点がある。In this conventional method, a large resist film that forms a conductor pattern is patterned every time a smooth circuit board is manufactured, but this patterning determines the dimensional accuracy of the conductor pattern, so great care must be taken. However, the manufacturing process is troublesome and has the disadvantage of low efficiency.
また、パターニングは、レジスト膜の被着、所望のパタ
ーニング
どの工程を必要とするので製造工程数が多くなり、コス
トの増大を招く欠点がある。さらに、従来の方法では、
金属板と絶縁基板とが直接接触されるので、これらを剥
離性の良い材料で造る必要があ・す、材料選択の自由度
が制限される欠点もある。Furthermore, patterning requires steps such as depositing a resist film and performing desired patterning, which increases the number of manufacturing steps and has the disadvantage of increasing costs. Furthermore, traditional methods
Since the metal plate and the insulating substrate are in direct contact with each other, they must be made of a material with good releasability, but there is also the disadvantage that the degree of freedom in material selection is restricted.
本発明の目的は上述した従来の欠点を除去し、微細な導
体パターンを形成することができ、しかも工程が簡単で
、コストを低減することができる平滑回路板の製造方法
を提供しようとするもので′ある。An object of the present invention is to eliminate the above-mentioned conventional drawbacks, and to provide a method for manufacturing a smooth circuit board that can form a fine conductor pattern, has a simple process, and can reduce costs. There is.
本発明の製造方法は、
（ａ） 所望の導体パターンに対応する部分が露出し、
それ以外の部分には絶縁物が埋設された平坦な表面を有
する導電基板より成る原版を１１Ｊ造する工程と、
中） 前記原版の、導電基板の露出表面にメッキ膜を形
成する工程と、
（Ｃ）前記原版に絶縁基板を重ねてメッキ膜を絶縁基板
へ転写する工程と、
（ｄ） メッキ膜が転写された絶縁基板から原版を剥離
する工程と、
（ｅ） 同一原版に対して前記工程の） 、 （Ｃ）お
よび（ｄ）を繰返し施して次々と平滑回路板を製造する
工程とを具えることを特徴とするものである。The manufacturing method of the present invention includes: (a) a portion corresponding to a desired conductor pattern is exposed;
a step of manufacturing an original plate made of a conductive substrate having a flat surface with an insulating material embedded in the other parts; (m) forming a plating film on the exposed surface of the conductive substrate of the original plate; C) a step of stacking an insulating substrate on the original plate and transferring the plating film to the insulating substrate; (d) a step of peeling off the original plate from the insulating substrate to which the plating film has been transferred; and (e) performing the above steps on the same original plate. ), (C) and (d) are repeatedly applied to produce smooth circuit boards one after another.
以下、図面を参照して本発明の詳細な説明するｌ。Hereinafter, the present invention will be described in detail with reference to the drawings.
第２図Ａ−ｉＪは本−〇明の平滑回路板の製造方法の一
例の順次の工程を示すものである。先ず、第２図Ａに示
すようにステンレス等の導電性材料より成る基板１１を
用意し、次に第２図Ｂに示すようにその表面に感光性樹
脂より成るホトレジスト膜１２を被着する。このレジス
ト膜１２を所望の導電パターンに対応して露光し、現像
してレジスト膜を選択的に除去して窓］Ｊａを形成する
。次にレジスト膜１２に形成された窓１２ａを介してエ
ツチングを行ない、第２図りに示すように基板１１を部
分的に除去して孔１１ａを形成した後、第２図Ｅに示す
ように残存するレジスト膜１２を除去する。次に第２図
Ｆに示すように孔１１ａ内にガラス等の絶縁物１８を堆
積させる。この絶縁物１８は導電基板１１の表面より盛
り上がる程度まで堆積させる。次に表面を研磨して第２
図Ｇに示すように鏡面とする。本発明においては、この
ようにして表面に絶縁物パターンを埋設形成した導電基
板を平滑回路板を＠造するための原版１４、とじて使用
する。Figures 2A-iJ show the sequential steps of an example of the method for manufacturing a smooth circuit board according to the present invention. First, as shown in FIG. 2A, a substrate 11 made of a conductive material such as stainless steel is prepared, and then, as shown in FIG. 2B, a photoresist film 12 made of a photosensitive resin is deposited on its surface. This resist film 12 is exposed to light corresponding to a desired conductive pattern, developed and selectively removed to form a window Ja. Next, etching is performed through the window 12a formed in the resist film 12, and after partially removing the substrate 11 to form a hole 11a as shown in the second figure, the remaining part as shown in FIG. The resist film 12 to be removed is removed. Next, as shown in FIG. 2F, an insulator 18 such as glass is deposited in the hole 11a. This insulator 18 is deposited to the extent that it rises above the surface of the conductive substrate 11. Next, polish the surface and
A mirror surface is used as shown in Figure G. In the present invention, the conductive substrate on which the insulator pattern is embedded in the surface in this manner is used as the master plate 14 for manufacturing a smooth circuit board.
第２図Ｈに示すように原版１３にメッキ処理を施して導
電基板１１の露出表面上にメッキ膜１５を形成する。こ
のメッキ膜の材料としては銅、ニッケル、金などを用ル
）ることかできる。次に第２・・図工に示すように原版
１４上にガラスエポキシ、ポリエステル、ポリイミドな
どの絶縁材料より成る絶縁基板１６を載せ、全体を加熱
加圧してメッキ膜１５を絶縁基板１６上に転写する。最
後に、原版１４を絶縁基板１６から剥離して、絶縁柄版
１ｄの表面にメッキ膜１１５より成る導体パターンを埋
設形成した平滑回路板１７を形成する。一方、剥離した
原版１４は、次の平滑回路板を形成するために再使用す
る。すなわち、第２図Ｈに示すように原版１４の導電基
板１１の露出表面にメッキ膜１５を形成し、第２図工お
よびＪに示す工程を経て平滑回路板１７を形成する。As shown in FIG. 2H, the original plate 13 is plated to form a plating film 15 on the exposed surface of the conductive substrate 11. As shown in FIG. Copper, nickel, gold, etc. can be used as the material for this plating film. Next, as shown in the second drawing, an insulating substrate 16 made of an insulating material such as glass epoxy, polyester, polyimide, etc. is placed on the original plate 14, and the entire plated film 15 is transferred onto the insulating substrate 16 by heating and pressurizing. . Finally, the original plate 14 is peeled off from the insulating substrate 16 to form a smooth circuit board 17 in which a conductive pattern made of a plating film 115 is embedded in the surface of the insulating pattern plate 1d. On the other hand, the peeled original plate 14 is reused to form the next smooth circuit board. That is, as shown in FIG. 2H, a plating film 15 is formed on the exposed surface of the conductive substrate 11 of the original plate 14, and a smooth circuit board 17 is formed through the steps shown in FIG. 2 and J.
上述したように、本発明の製造方法によれば、リングラ
フの手法により原版１４を一度形成し、以後はこの原版
に対してメッキ処理、ホットプレ・入処理、剥離処理を
繰返すだけで多数の平滑回路１板を製造することができ
る。原版１４を繰返し使用して行くと、表面が損傷する
ことがあるが、この場合には表面を研磨することにより
容易に再生することができる。したがって一枚の原版力
）らきへわめて多数の平滑回路板を製造することができ
る。As described above, according to the manufacturing method of the present invention, the original plate 14 is formed once using the ring graph method, and thereafter, a large number of smoothing circuits can be fabricated simply by repeating the plating process, the hot pre-insertion process, and the peeling process on this original plate. One plate can be manufactured. If the original plate 14 is used repeatedly, the surface may be damaged, but in this case, it can be easily regenerated by polishing the surface. Therefore, an extremely large number of smooth circuit boards can be manufactured using a single original plate.
上述した方法では、絶縁物１８は、導電基板１１と熱膨
張係数が等しく、転写のためのホットプレスによる加圧
、高温に耐える絶縁材料とする必要があるが、導電基板
１１としてステンレススチール□を用い、絶縁物１８と
してガラスを用いたものが好適である。しかし、他の材
料の組合せも上述した条件を満たすものであれば用いる
ことができることは勿論である。In the method described above, the insulator 18 needs to be an insulating material that has the same coefficient of thermal expansion as the conductive substrate 11 and can withstand pressure and high temperatures by hot pressing for transfer. It is preferable to use glass as the insulator 18. However, it goes without saying that combinations of other materials can also be used as long as they satisfy the above-mentioned conditions.
第３図は上述した原版を製造する他の例の順次の工程を
示すものであり、第８図Ａ−（３に示すようにアルミニ
ウムのような金属より成る導電基板２１の表面にレジス
ト膜２２を被着し、これを露−光、現像して所望の導体
パターンに対応した窓２２ａを形成するまでの工程は前
例と同じである。FIG. 3 shows the sequential steps of another example of manufacturing the above-mentioned original plate. As shown in FIG. The steps of depositing, exposing and developing the film to form the window 22a corresponding to the desired conductor pattern are the same as in the previous example.
・本例ではレジスト膜２２を酸化防止マスクとして用い
、導電基板２１の露出表面を酸化して第８図りに示すよ
うに絶縁性の酸化膜すなわち酸化アルミニュウム膜２８
を形成する。次に番一杯蟇品尋←番今餐導電基板２１の
表面上に残存するレジスト膜２２を除去した後、表面を
平坦に研磨して第８図Ｅに示すような原版２４を形成す
る。このようにして形成した原版２４を用いて第２図Ｈ
−Ｊに示す工程を繰返し行なって多数の平滑回路板を形
成することは前例と同様である。- In this example, the resist film 22 is used as an oxidation prevention mask, and the exposed surface of the conductive substrate 21 is oxidized to form an insulating oxide film, that is, an aluminum oxide film 28, as shown in Figure 8.
form. Next, after removing the resist film 22 remaining on the surface of the conductive substrate 21, the surface is polished to a flat surface to form an original plate 24 as shown in FIG. 8E. Using the original plate 24 formed in this way, FIG.
It is the same as in the previous example that a large number of smooth circuit boards are formed by repeating the process shown in -J.
上述したように、本発明の製造方法Ｇこよれば、導電基
板の表面の、所望の導体パターン以外の部分に絶縁物を
埋込んで平坦とした原版を造り、この原版に対してメッ
キ処理、転写処理、剥離処理を順次に繰返し施すことに
より多数の平滑回路板を次々と製造するようにしたため
、精密な処理が要求されるレジスト膜のパターニングを
毎回行なう必要がないので、レジスト膜の被着工程、露
光、現像工程、残存するレジスト膜の除去工程などを毎
回行なう必要はなくなり、製造工数は大幅に少な・くな
り、製造は非常に簡単となり、平滑回路板の１コストを
低減することができる。また転写を行なう際に絶縁基板
と導電基板とは直接接触しておらず、これらの材料を剥
離性の良いものを用いる必要がなくなり、材料の選択が
容易となると共に導へ電基板の表面に埋設した絶縁物と
して絶縁基板との剥離性の良いものを選択することがで
きるので、平滑回路板の表面の平滑性を一層良好とする
ことができる。As described above, according to the manufacturing method G of the present invention, a flat original plate is created by embedding an insulator in the surface of the conductive substrate other than the desired conductive pattern, and this original plate is subjected to plating treatment, Since a large number of smooth circuit boards are manufactured one after another by sequentially repeating the transfer process and peeling process, there is no need to pattern the resist film, which requires precision processing, each time. It is no longer necessary to perform processes such as exposure, development, and removal of remaining resist films every time, and the number of manufacturing steps is greatly reduced. Manufacturing is extremely simple, and the cost of smooth circuit boards can be reduced. can. In addition, the insulating substrate and conductive substrate are not in direct contact during transfer, eliminating the need to use materials with good releasability. Since the buried insulator can be selected to have good peelability from the insulating substrate, the smoothness of the surface of the smooth circuit board can be further improved.
第１図Ａ−Ｇは従来の平滑回路板の製造方法の順次の工
程を示す断面図、
第２図Ａ−Ｊは本発明による平滑回路板の製造方法の一
例の順次の工程を示す断面図、第８図Ａ−Ｅは本発明に
用いる原版の製造方法の他の例の順次の工程を示す断面
図である。
１１・・・導電基板 １２・・・レジスト膜１２ａ・・
・窓 １１ａ・・・孔
１３・・・絶縁物 １４・・・原版
１５・・・メッキ膜 １６・・・絶縁基板２２・・・レ
ジストＭ ｚ２ａ−＠
２８・・・酸化膜 ２４・・・原版。
特許出願人 株式会社 コパル
＜ ｇｃ４ｃｗ Ｑ 闇 −
ｃｌ！＄ 悶 −鴫FIGS. 1A-G are cross-sectional views showing sequential steps in a conventional method for manufacturing a smooth circuit board, and FIGS. 2 A-J are cross-sectional views showing sequential steps in an example of a method for manufacturing a smooth circuit board according to the present invention. , and FIGS. 8A to 8E are cross-sectional views showing the sequential steps of another example of the method for manufacturing the original plate used in the present invention. 11... Conductive substrate 12... Resist film 12a...
- Window 11a... Hole 13... Insulator 14... Original plate 15... Plating film 16... Insulating substrate 22... Resist M z2a-@ 28... Oxide film 24... Original plate . Patent applicant Copal Co., Ltd. <gc4cw Q darkness - cl! $ Agony - Shizuku
Claims (1)
それ以外の部分には絶縁物が埋設された平坦な表面を有
する導電基板より成る原版を製造する工程と、 ［有］）前記原版の、導電基板の露出表面にメッキ膜を
形成する工程と、 （０） 前記原版、に絶縁基板を重ねてメッキ膜を絶縁
基板へ転写する工程と、 （（ｉ） メッキ膜が転写された絶縁基板から原版を剥
離する工程と、 （ｅ） 同一原版に対して前記工程（ｂ） 、 （０）
および（ｄ）を繰返し施して次々と平滑回路板を製造す
る工程とを具えることを特徴とする平滑回路板の製造方
法。 ｉ 前記工程（ａ）が、 導電基板の表面に、導体パターン以外の部分に窓を有す
るレジスト膜を形成する工程と、前記窓を介して導電基
板をエツチングして１孔を形成する工程と、 前記孔内に絶縁物を埋設する工程と、 導電基板および絶縁物の表面を平坦な鏡面に研磨する工
程とを含むことを特徴とする特許請求の範［１記載の平
滑回路板の製造方法。 ＆ 前記工程（ａ）が、 導電基板の表面に、導体パターン以外の部分に窓を有す
る酸化防止膜を形成する工程と、前記窓を介して導電基
板の露出表面を酸化して絶縁酸化膜を形成する工程と、 酸化防止膜を除去する工程と、 導電基板および絶縁酸化膜を平坦な鏡面に研磨する工程
とを含むことを特徴とする特許請求の範囲ｌ記載の平滑
回路板の製造方法。[Claims] 1(a) A portion corresponding to a desired conductor pattern is exposed;
a step of manufacturing an original plate made of a conductive substrate having a flat surface with an insulator embedded in the other parts, and a step of forming a plating film on the exposed surface of the conductive substrate of the original plate; (0) a step of stacking an insulating substrate on the original plate and transferring the plating film to the insulating substrate; (i) a step of peeling off the original plate from the insulating substrate to which the plating film has been transferred; and (e) for the same original plate. and the above step (b), (0)
and (d) repeatedly to manufacture smooth circuit boards one after another. i. The step (a) includes: forming a resist film having a window in a portion other than the conductive pattern on the surface of the conductive substrate; etching the conductive substrate through the window to form one hole; The method for manufacturing a smooth circuit board according to claim 1, comprising the steps of: burying an insulator in the hole; and polishing the surfaces of the conductive substrate and the insulator to a flat mirror surface. & The step (a) includes forming an oxidation prevention film having a window in a portion other than the conductive pattern on the surface of the conductive substrate, and oxidizing the exposed surface of the conductive substrate through the window to form an insulating oxide film. 2. The method of manufacturing a smooth circuit board according to claim 1, comprising the steps of forming a conductive substrate and an insulating oxide film to a flat mirror surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22757983A JPS60119791A (en) | 1983-12-01 | 1983-12-01 | Method of producing smoothing circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22757983A JPS60119791A (en) | 1983-12-01 | 1983-12-01 | Method of producing smoothing circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60119791A true JPS60119791A (en) | 1985-06-27 |
Family
ID=16863125
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22757983A Pending JPS60119791A (en) | 1983-12-01 | 1983-12-01 | Method of producing smoothing circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60119791A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6486590A (en) * | 1987-06-25 | 1989-03-31 | Matsushita Electric Works Ltd | Manufacture of insulating substrate with electric path |
| JPH08125308A (en) * | 1994-10-27 | 1996-05-17 | Toshiba Corp | Transfer board for manufacture of circuit substrate |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4891560A (en) * | 1972-03-06 | 1973-11-28 | ||
| JPS51104570A (en) * | 1975-03-12 | 1976-09-16 | Kuranosuke Ito | Metsukikairono tenshaahaisenban |
-
1983
- 1983-12-01 JP JP22757983A patent/JPS60119791A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4891560A (en) * | 1972-03-06 | 1973-11-28 | ||
| JPS51104570A (en) * | 1975-03-12 | 1976-09-16 | Kuranosuke Ito | Metsukikairono tenshaahaisenban |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6486590A (en) * | 1987-06-25 | 1989-03-31 | Matsushita Electric Works Ltd | Manufacture of insulating substrate with electric path |
| JPH08125308A (en) * | 1994-10-27 | 1996-05-17 | Toshiba Corp | Transfer board for manufacture of circuit substrate |
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