JPS60113958A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS60113958A
JPS60113958A JP58222683A JP22268383A JPS60113958A JP S60113958 A JPS60113958 A JP S60113958A JP 58222683 A JP58222683 A JP 58222683A JP 22268383 A JP22268383 A JP 22268383A JP S60113958 A JPS60113958 A JP S60113958A
Authority
JP
Japan
Prior art keywords
semiconductor device
solder
lead terminals
substrate
grooves
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58222683A
Other languages
Japanese (ja)
Inventor
Masakazu Nakabayashi
正和 中林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP58222683A priority Critical patent/JPS60113958A/en
Publication of JPS60113958A publication Critical patent/JPS60113958A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H01L23/49555—Cross section geometry characterised by bent parts the bent parts being the outer leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a semiconductor device, in which a resin seal body is not lifted and shifted, by bending a plurality of lead terminals to an L-shape on the outside, forming indentation sections consisting of grooves to the backs of the terminals and previously filling the grooves with solder cream when the lead terminals projecting from the resin seal body are fixed onto an IC substrate. CONSTITUTION:When a plurality of lead terminals 5 projecting from a resin sealed body 1 are fixed onto an IC substrate 3, these lead terminals 5 are bent to an L-shape on the outside of the sealed body, and indentation sections 6 composed of grooves are bored to the bent backs, and the grooves are filled previously with cream solder. Bonding sections 5a filled with cream solder are brought into contact with the surface of the substrate 3, and passed through a heating furnace, and the flowing section of solder is absorbed into clearances among the indentation sections 6. Accordingly, adhesion is increased while the shifting and lifting of the sealed body 1 are prevented.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、基板上にリード端子のはんだ付けにより装
着される半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device mounted on a substrate by soldering lead terminals.

〔従来技術〕[Prior art]

例えば、ハイブリッドエＣなどの基板上に１、チップト
ランジスタなど樹脂封止形の半導体装置が、リード端子
のはんだ付けにより装着されている。゛従来のこの種の
半導体装置として、チップトランジスタの場合を、第１
図及び第２図に正面図及び側面図で示す。（１）は樹脂
封止体で、内部にトランジスタ素子部を封止している。For example, a resin-sealed semiconductor device such as a chip transistor is mounted on a substrate such as a Hybrid E-C by soldering lead terminals.゛As a conventional semiconductor device of this type, the case of a chip transistor is the first
It is shown in front view and side view in FIG. (1) is a resin-sealed body in which a transistor element portion is sealed.

（２）は樹脂封止体（１）内から外部に引出された複数
のリード端子で、下方に折曲げられ下端がきらに水平に
折曲げられ１、底面が接着部（２ａ）をなしている。(2) is a plurality of lead terminals pulled out from inside the resin sealing body (1), bent downward, the lower end is bent horizontally, and the bottom surface forms the adhesive part (2a). There is.

このように形成されたチップトランジスタを、・・イブ
リッドＩＣの基板（３）上の配線上（図示は略す）には
んだクリームなどはんだ材を介してリード端子（２）の
接着部（２ａ）で接して載せ、加熱炉に通してはんだ付
は装着する。The chip transistor thus formed is connected to the wiring (not shown) on the substrate (3) of the hybrid IC via the adhesive part (2a) of the lead terminal (2) via a solder material such as solder cream. Place it on the board, pass it through a heating furnace, and then solder it.

上記従来のチップトランジスタでは、リード端子（２）
の底面の接着部（２ａ）下に挾まれたはんだ材が溶融し
たとき、チップトランジスタが移動したり、又は浮き上
りが生じたりして接着力が低減し、信頼性が低下するお
それがあった０ 〔発明の概要〕 この発明は、半導体装置のリード端子の水平に折曲げら
れた下端底面にくぼみ部を設け、基板上へのはんだ付け
による移動や浮き上りを防ぎ、接着力が増大され、信頼
性を向上した半導体装置を提供することを目的としてい
る０ 〔発明の実施例〕 第３図及び第４図はこの発明の一実施例による半導体装
置の正面図及び側面図であり、半導体装置としてチップ
トランジスタの場合を示す。トランジスタ素子を封止し
た樹脂封止体（１）から複数のリード端子（５）が出さ
れ、下方に折曲げられて下端がさらに水平に折曲げられ
、底面の接着部（５ａ）には溝によるくぼみ部（６）が
設けられている。In the above conventional chip transistor, the lead terminal (2)
When the solder material sandwiched under the adhesive part (2a) on the bottom of the chip melts, the chip transistor may move or lift up, reducing adhesive strength and potentially reducing reliability. 0 [Summary of the Invention] The present invention provides a recessed portion on the bottom surface of the horizontally bent lower end of a lead terminal of a semiconductor device, prevents movement or lifting due to soldering onto a substrate, increases adhesive strength, [Embodiment of the Invention] FIGS. 3 and 4 are a front view and a side view of a semiconductor device according to an embodiment of the present invention. The case of a chip transistor is shown as follows. A plurality of lead terminals (5) are taken out from the resin sealing body (1) in which the transistor element is sealed, bent downward, and the lower end is further bent horizontally, and a groove is formed in the adhesive part (5a) on the bottom surface. A recessed portion (6) is provided.

上記トランジスタチップを、セラミックなどからなる基
板（３）上の配線上にはんだクリームなどはんだ材を介
しリード端子（５）の接着部（５ａ）で接′して載せ、
加熱炉に通してはんだ付は装着する。この場合、溶融し
たはんだの流動した分はくぼみ部（６）Ｋよるすき間に
吸収され、チップトランジスタの移動が防止され、さら
に接着面積の増加により接着力が増大される。The transistor chip is placed on the wiring on the substrate (3) made of ceramic or the like by connecting it with the adhesive part (5a) of the lead terminal (5) through a solder material such as solder cream,
Pass it through a heating furnace and solder it. In this case, the flowing portion of the molten solder is absorbed into the gap formed by the recess (6) K, preventing movement of the chip transistor, and further increasing the bonding force by increasing the bonding area.

第５図及び第６図はこの発明の他の実施例を示す、半導
体装置としてチップトランジスタの場合の正面図及び側
面図である。樹脂封止体（１）から出された複数のリー
ド端子（７）の下端の水平に折曲げられた底面の接着部
（７ａ）には、円弧状に曲げ成形によるくほみ部（８）
が設けられている。このくぼみ部（８）により、はんだ
付は装着の場合の、チップトランジスタの移動を防ぎ、
接着力が増大されるようにしている。5 and 6 are a front view and a side view of a chip transistor as a semiconductor device, showing another embodiment of the present invention. At the adhesive part (7a) of the horizontally bent bottom surface of the lower end of the plurality of lead terminals (7) taken out from the resin sealing body (1), there is a concave part (8) formed by bending into an arc shape.
is provided. This recess (8) prevents the chip transistor from moving during soldering and mounting.
The adhesive force is increased.

なお、上記実施例では、半導体装置としてチップトラン
ジスタの場合を示したが、同様なリード端子の構造をも
つ他の種の半導体装置、例えば、ＩＣパッケージのフラ
ット形の場合にも適用できるものである。In the above embodiment, a chip transistor is used as the semiconductor device, but the present invention can also be applied to other types of semiconductor devices having a similar lead terminal structure, such as a flat type IC package. .

〔発明の効果〕〔Effect of the invention〕

以上のように１この発明によれば、樹脂封止体から出さ
れ下方に折曲げられ、下端がさらに水平に折曲げられた
複数のリード端子の下端底面の接着部にくぼみ部を設け
たので、接着部ではんだ材を介して基板上にはんだ付は
装着するのに、半導体装１ｄの移動や浮上りが防止され
、接着力が増大し、信頼性が向上される。As described above, 1. According to the present invention, a recessed portion is provided at the adhesive portion of the bottom surface of the lower end of a plurality of lead terminals which are taken out from the resin sealing body, bent downward, and whose lower ends are further bent horizontally. Even though the semiconductor device 1d is soldered onto the board via the solder material at the bonding portion, movement and floating of the semiconductor device 1d is prevented, the adhesive force is increased, and reliability is improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図及び第２図は従来の半導体装置を示すチップトラ
ンジスタの場合の正面図及び側面図、第３図及び第４図
はこの発明の一実施例による半導体装置を示すチップト
ランジスタの場合の正面図及び側面図、第５図及び第６
図はこの発明の他の実施例を示すチップトランジスタの
正面図及び側面図である。 １・・・樹脂封止体、５・・・リード端子、５ａ・・接
着部、６・・・くぼみ部、７・・・リード端子、’７ａ
・・・接着部、８・・・くほみ部 なお、図中同一符号は同−又は相当部分を示す。 代理人大岩増雄 第１図　第２図 第す図　第Ｏ図1 and 2 are a front view and a side view of a chip transistor showing a conventional semiconductor device, and FIGS. 3 and 4 are front views of a chip transistor showing a semiconductor device according to an embodiment of the present invention. Figures and side views, Figures 5 and 6
The figures are a front view and a side view of a chip transistor showing another embodiment of the invention. DESCRIPTION OF SYMBOLS 1... Resin sealing body, 5... Lead terminal, 5a... Adhesive part, 6... Recessed part, 7... Lead terminal, '7a
. . . Adhesive portion, 8 . Agent Masuo Oiwa Figure 1 Figure 2 Figure S Figure O

Claims (3)

【特許請求の範囲】[Claims] （１）半導体素子部を封止した樹脂封止体、及びこの樹
脂封止体から出され下方に折曲げられ、下端が水平に折
曲げられた複数のリード端子を備えた半導体装置におい
て、これらのリード端子の下端底面のはんだ接着部にく
ぼみ部を設け、基板上に上記接着部ではんだ付は装着さ
れるようにしたことを特徴とする半導体装置。(1) In a semiconductor device equipped with a resin molded body that encapsulates a semiconductor element part, and a plurality of lead terminals that are taken out from the resin molded body and bent downward, and whose lower ends are bent horizontally, these A semiconductor device characterized in that a recess is provided in the solder bonding portion on the bottom surface of the lower end of the lead terminal, and the solder is mounted on the substrate at the bonded portion. （２）リード端子の接着部のくぼみ部は、溝により形成
されたことを特徴とする特許請求の範囲第１項記載の半
導体装置。(2) The semiconductor device according to claim 1, wherein the recessed portion of the adhesive portion of the lead terminal is formed by a groove. （３）リード端子の接着部のくぼみ部は、円弧状に曲げ
成形されてなることを特徴とする特許請求の範囲第１項
記載の半導体装置。(3) The semiconductor device according to claim 1, wherein the recessed portion of the adhesive portion of the lead terminal is bent into an arc shape.
JP58222683A 1983-11-26 1983-11-26 Semiconductor device Pending JPS60113958A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58222683A JPS60113958A (en) 1983-11-26 1983-11-26 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58222683A JPS60113958A (en) 1983-11-26 1983-11-26 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS60113958A true JPS60113958A (en) 1985-06-20

Family

ID=16786279

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58222683A Pending JPS60113958A (en) 1983-11-26 1983-11-26 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS60113958A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0465158A (en) * 1990-07-05 1992-03-02 Mitsubishi Electric Corp Manufacture of semiconductor device
JPH0577947U (en) * 1992-03-27 1993-10-22 安藤電気株式会社 Surface mount IC L-shaped terminal
JP2009138780A (en) * 2007-12-03 2009-06-25 Tokai Univ Fastener structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0465158A (en) * 1990-07-05 1992-03-02 Mitsubishi Electric Corp Manufacture of semiconductor device
JPH0577947U (en) * 1992-03-27 1993-10-22 安藤電気株式会社 Surface mount IC L-shaped terminal
JP2009138780A (en) * 2007-12-03 2009-06-25 Tokai Univ Fastener structure

Similar Documents

Publication Publication Date Title
KR100192028B1 (en) Plastic package type semiconductor device
KR900005587A (en) Semiconductor device and manufacturing method
JPH0350758A (en) Resin seal type semiconductor device
US6501160B1 (en) Semiconductor device and a method of manufacturing the same and a mount structure
US5909054A (en) Semiconductor device having a multiple-terminal integrated circuit formed on a circuit substrate
US5898212A (en) Lead frame and semiconductor package
KR950024315A (en) Lead frame for semiconductor and manufacturing method
JPS60167454A (en) Semiconductor device
JPS60113958A (en) Semiconductor device
KR100390466B1 (en) multi chip module semiconductor package
KR100249410B1 (en) Semiconductor device
KR100237912B1 (en) Packaged semiconductor, semiconductor device made therewith and method for making same
JPH09129796A (en) Semiconductor device
KR100221918B1 (en) Chip scale package
KR100214857B1 (en) Multi-chip package
JPH04155949A (en) Resin-sealed semiconductor device
JPH0582586A (en) Semiconductor device and manufacture thereof
JP2002076161A (en) Surface mounting type semiconductor device
JPH11150208A (en) Mounting of semiconductor element
JPS62169461A (en) Semiconductor device
KR200154510Y1 (en) Lead on chip package
JPH04320052A (en) Semiconductor device
JPH0677284A (en) Semiconductor device
KR0142756B1 (en) Loc package
KR0112031Y1 (en) Structure of solder fillet