JPS60110148A - Resin-sealed type semiconductor device - Google Patents

Resin-sealed type semiconductor device

Info

Publication number
JPS60110148A
JPS60110148A JP58218265A JP21826583A JPS60110148A JP S60110148 A JPS60110148 A JP S60110148A JP 58218265 A JP58218265 A JP 58218265A JP 21826583 A JP21826583 A JP 21826583A JP S60110148 A JPS60110148 A JP S60110148A
Authority
JP
Japan
Prior art keywords
resin
semiconductor device
thermal conductivity
sealing resin
paste
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58218265A
Other languages
Japanese (ja)
Inventor
Tomio Okamoto
岡本 富美夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electronics Corp
Priority to JP58218265A priority Critical patent/JPS60110148A/en
Publication of JPS60110148A publication Critical patent/JPS60110148A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

PURPOSE:To improve heat sink characteristic with a simple structure by bonding a paste material which has a thermal conductivity higher than an enclosure sealing resin material on the back surface of a semiconductor chip placing plate. CONSTITUTION:A semiconductor chip 1 is secured to the surface of a chip placing plate 2, electrically connected by fine gold wirings 4 with the inner ends of leads 3 and sealed with an enclosure sealing resin 5. A paste material 6 which has a thermal conductivity higher than the resin 5 is bonded to the back surface of the plate 2. The material 6 is formed by coating and curing the mixture of, for example, silver powder and epoxy resin. The material 6 may be formed by mixing a metal of gold, aluminum or copper, sintered powder of alumina or beryllia with epoxy resin. Thus, the heat generated at the element is transmitted to the plate 2 and the material 6 efficiently to the vicinity of the surface of the resin enclosure. Accordingly, the heat sink characteristic is improved.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は扮脂封止された半導体装置に関する。[Detailed description of the invention] Industrial applications TECHNICAL FIELD The present invention relates to a semiconductor device encapsulated with resin.

従来例の構成とその問題点 近年、半導体装置のパッケージ形態としてはコス) 、
 :iji:産性向で有利な樹脂封止型が玉流をしめて
いる。また、高密度実装を実現するために、その外形は
より小型、薄型化が進んでいる。その−例であるフラッ
トパッケージ型を例にとって、従来装置の構造を第1図
を参照して説明する。半導体チップ1が、鉄ニッケルを
生体とする材料からなる載置板2に固定され、同じ材料
からなるリード3の内端と通常、金細線4によって電気
的に接続され、リードの外端が突出したかたちで外囲封
止樹脂6によって封止されている0このような構造の半
導体装置において、放熱特性を改善する手段としては、
たとえば、 (1) 載置板2およびリード3の材料として高熱伝導
度の銅を主体とする合金を用いる。
Conventional configurations and their problemsIn recent years, the packaging format for semiconductor devices has become cost-effective.
:iji: The resin-sealed type, which is advantageous in terms of productivity, is the most popular. In addition, in order to achieve high-density packaging, their external dimensions are becoming smaller and thinner. Taking a flat package type as an example, the structure of a conventional device will be explained with reference to FIG. A semiconductor chip 1 is fixed to a mounting plate 2 made of iron-nickel as a living material, and electrically connected to the inner ends of leads 3 made of the same material, usually by thin gold wires 4, with the outer ends of the leads protruding. In a semiconductor device having such a structure, which is sealed with the outer sealing resin 6, as a means for improving the heat dissipation characteristics,
For example, (1) As the material of the mounting plate 2 and the leads 3, an alloy mainly composed of copper with high thermal conductivity is used.

(功 外囲封止樹脂として熱伝導度の高い材料を用いる
(Use a material with high thermal conductivity as the outer sealing resin.

(′4 素子載置板の下に、封止仙脂よりも大なる熱伝
導度を有する。金属あるいはセラミックの板を埋設する
等があげられる。
('4) It has a higher thermal conductivity than the sealing resin under the element mounting plate. A metal or ceramic plate may be buried.

これらの手段によれば、それぞれ、次にあげるような不
都合が避けられない。
According to these means, the following disadvantages are unavoidable.

(1)鉄−ニッケル合金に比べて機械的強度に乏しく、
リードを余り細くできない。また、完成後リードの変形
、破損事故が生じやすい。
(1) Poor mechanical strength compared to iron-nickel alloys,
The lead cannot be made too thin. In addition, deformation and breakage of the leads are likely to occur after completion.

(→ 結晶性シリカを多く含む材料を使うことになり、
金型摩耗がはげしい。
(→ Materials containing a large amount of crystalline silica will be used,
Severe mold wear.

(31仮相を載置板2の裏面に接着するか、あるいは、
金型の底面上に置く煩雑な工程が必要となるO 発明の目的 本発明は、上記問題点をことごとく解消し、簡素な構造
で、十分に放熱特性を向上させ得る樹脂封止型半導体装
置を供給することを目的とする。
(Gluing the temporary phase 31 to the back surface of the mounting plate 2, or
OBJECT OF THE INVENTION The present invention solves all of the above problems and provides a resin-sealed semiconductor device that has a simple structure and can sufficiently improve heat dissipation characteristics. The purpose is to supply.

発明の構成 本発明は、半導体チップ載置板の裏面に、外囲封止樹脂
相よりも高い熱伝導度を有するペースト材が刺着されて
いる樹脂封止型半導体装置であり、これによれば、リー
ドフレームや封止樹脂材料をかえることなく、また、高
熱伝導度材からなる板を埋設するだめの煩雑な工程を用
いることなく、放熱特性のすぐれた樹脂封止型半導体装
置が得られる。
Structure of the Invention The present invention is a resin-sealed semiconductor device in which a paste material having higher thermal conductivity than the surrounding sealing resin phase is stuck to the back surface of a semiconductor chip mounting plate. For example, a resin-encapsulated semiconductor device with excellent heat dissipation characteristics can be obtained without changing the lead frame or the sealing resin material, and without using the complicated process of embedding a plate made of a high thermal conductivity material. .

実施例の説明 第2図は本発明の一実施例による樹脂封止型半導体装置
の構造を示す断面図である。この装置は、半導体チップ
1が同半導体テップ載置板2の表面に固定され、リード
3の内端と、金細線4によって電気的に接続され、リー
ド3の外端が外部リード体として突出したかたちで外囲
封止樹脂5によって封止されていることのほかに、素子
載置面2の裏面に、封止樹脂よりも高熱伝導度ペースト
材6を付着させている。ペースト材6は、たとえば銀の
粉末をエポキシ樹脂に混ぜたものを塗布、硬化させて形
成される。ペースト材6の塗布は、スタンピング、ある
いは、スクII−ン印刷によって容易に行なうことがで
きる。塗布する厚みとしては、最終的にペースト材を覆
う封止樹脂の厚みが極度にうずくならない範囲で極力厚
くするのが好ましい。またペースト材6としては銀−エ
ポキシ以外に金、アルミニウム、銅などの金属や、アル
ミナ、ベリリアなどの金属酸化物を素材と゛する焼結体
、例えばセラミックの粉末を、エポキシ樹脂に混合した
ものでもよい。また樹脂として、ポリイミド樹脂を用い
ると耐熱性のすぐれたペースト拐となる。以上述べたよ
うな構造にすれば、半導体素子載置板の裏面に封止樹脂
よりも高い熱伝導度を有するペースト材(たとえば通常
の封止樹脂では13〜18 X 10 calloae
 SK * ”Cに対して銀−エポキシ系ペーストでは
50X10cal/CIL a st’c・”C)が塗
布されたことにより、素子で発生ずる熱が載置板2とペ
ースト材6とを伝わって、(01脂外囲器表面近くまで
効率よく達するので、放熱+1!J性のすぐれた樹脂封
止型半導体装置が得られる() 発明の効果 本発明によれば、半導体チップ載置板の裏面に、外囲封
止樹脂材よりも高熱伝導度を有するペーストkAが塗布
されており、これによれば、従来例のようVCl例えば
、リードフレームや封止樹脂の材料をかえたり、チップ
載置板の下に埋設する板材を準備することなしに、すぐ
れた放熱特性を有する樹脂封止型半導体装置が実現でき
る。また、この発明は実施例で挙げたフラットパッケー
ジに限らず、DIL型をはじめプラスチックチップキャ
リヤやSo(amall−outline)パッケージ
を含むすべての樹脂封止型半導体装置に応用できる。
DESCRIPTION OF EMBODIMENTS FIG. 2 is a sectional view showing the structure of a resin-sealed semiconductor device according to an embodiment of the present invention. In this device, a semiconductor chip 1 is fixed to the surface of a semiconductor chip mounting plate 2, electrically connected to the inner ends of leads 3 by thin gold wires 4, and the outer ends of the leads 3 protrude as external lead bodies. In addition to being sealed with the outer sealing resin 5, a paste material 6 with higher thermal conductivity than the sealing resin is adhered to the back surface of the element mounting surface 2. The paste material 6 is formed by applying and curing a mixture of silver powder and epoxy resin, for example. The paste material 6 can be easily applied by stamping or screen printing. The thickness of the coating is preferably as large as possible without causing excessive tingling in the thickness of the sealing resin that ultimately covers the paste material. In addition to silver-epoxy, the paste material 6 may also be a sintered body made of metals such as gold, aluminum, copper, or metal oxides such as alumina or beryllia, such as ceramic powder mixed with epoxy resin. good. Furthermore, if polyimide resin is used as the resin, the paste will have excellent heat resistance. With the structure described above, a paste material having a higher thermal conductivity than the sealing resin (for example, a normal sealing resin has a thickness of 13 to 18
By applying 50X10 cal/CIL a st'c/''C) of silver-epoxy paste to SK*''C, the heat generated in the element is transmitted through the mounting plate 2 and the paste material 6, (Since the heat reaches the surface of the 01 resin envelope efficiently, it is possible to obtain a resin-sealed semiconductor device with excellent heat dissipation by +1! , a paste kA having a higher thermal conductivity than the surrounding sealing resin material is applied. According to this, unlike the conventional example, VCl, for example, the materials of the lead frame and sealing resin can be changed, and the chip mounting plate A resin-sealed semiconductor device with excellent heat dissipation characteristics can be realized without preparing a plate material to be buried underneath.In addition, this invention is applicable not only to the flat package mentioned in the embodiment, but also to plastic packages such as the DIL type. It can be applied to all resin-sealed semiconductor devices including chip carriers and So (amall-outline) packages.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の樹脂封止型半導体装置(フラットパッケ
ージ)の断面図、第2図は本発明の一実施例装置の断面
図である。 1・・−・−・半導体チップ、2−・・・・・半導体チ
ップ載置板、3・・・・−・リード、4−・−・・金細
線、5−・−・・・外囲封止樹脂、6・・・・・・銀ペ
ースト。
FIG. 1 is a sectional view of a conventional resin-sealed semiconductor device (flat package), and FIG. 2 is a sectional view of a device according to an embodiment of the present invention. 1-----Semiconductor chip, 2---Semiconductor chip mounting plate, 3---Lead, 4---Thin gold wire, 5---Outer enclosure Sealing resin, 6...Silver paste.

Claims (1)

【特許請求の範囲】[Claims] (1) Gl’導1ギチソプ載置板の裏面に、外囲封止
樹脂月よりも高い熱伝導度を有するペースト材が付着ラ
 されていることを特徴とする樹脂封止型半導体装11
’l’、 +1 (′4 ペースト4:4が金属粉を含む樹脂でなる特許
請求の411)間第1項に記載の樹脂封止型半導体装置
。 (→ ペースト材が金属酸化物粉を含む樹脂でなる’I
”J’ +/l’ 請求の範囲第1項に記載の樹脂封止
型半導体装置。
(1) A resin-sealed semiconductor device 11 characterized in that a paste material having a higher thermal conductivity than the outer sealing resin is adhered to the back side of the Gl' conductor mounting plate.
'l', +1 ('4) The resin-sealed semiconductor device according to claim 411, wherein the paste 4:4 is a resin containing metal powder. (→ Paste material is made of resin containing metal oxide powder)
"J'+/l'" The resin-sealed semiconductor device according to claim 1.
JP58218265A 1983-11-18 1983-11-18 Resin-sealed type semiconductor device Pending JPS60110148A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58218265A JPS60110148A (en) 1983-11-18 1983-11-18 Resin-sealed type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58218265A JPS60110148A (en) 1983-11-18 1983-11-18 Resin-sealed type semiconductor device

Publications (1)

Publication Number Publication Date
JPS60110148A true JPS60110148A (en) 1985-06-15

Family

ID=16717159

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58218265A Pending JPS60110148A (en) 1983-11-18 1983-11-18 Resin-sealed type semiconductor device

Country Status (1)

Country Link
JP (1) JPS60110148A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0315852A2 (en) * 1987-11-07 1989-05-17 BASF Aktiengesellschaft Printed circuit board with improved heat conductivity

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0315852A2 (en) * 1987-11-07 1989-05-17 BASF Aktiengesellschaft Printed circuit board with improved heat conductivity

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