JPS6010917A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To make the circuit operaion stable by flowing an opposite phase current of an output in an ECL to a ground line to make the voltage drop on the ground line constant. CONSTITUTION:When a base of a transistor (TR) 32 is connected to a reference voltage VR and a base potential of a TR31 is larger than the reference voltage VR, a TR36 is turned on, an output current flows to the ground line 320 via the TR36, an output terminal 310 and a load resistor 314, and when the base potential of the TR31 is smaller than the reference voltage VR, a TR37 is turned on and a current flows to the ground line 320 via a resistor 38, Thus, the same current is flowed to the ground line 320 even if the potential at the output terminal 310 is both high and low, the voltage drop of the ground line 320 is made constant therby making the circuit operation stable.

Description

DETAILED DESCRIPTION OF THE INVENTION 1) Technical Field of the Invention The present invention relates to a multi-bit output semiconductor integrated circuit with improved input threshold hold characteristics.

(2) Background of the Technology While demands for larger scale and multifunctional semiconductor integrated circuits are increasing, the number of output pins of semiconductor integrated circuits is increasing. As the number of output pins increases, the amount of change in the total output current increases. In other words, the change in power supply current becomes large. On the other hand, power for semiconductor integrated circuits is supplied from outside the semiconductor chip via wires. Therefore, the power supply voltage within the chip changes due to the voltage drop due to the resistance of the wire, especially for ECLs with small logic amplitude voltages.
In circuits, etc., there has been a demand for semiconductor integrated circuits that have less fluctuation in power supply current even when the number of output pins increases, which has an adverse effect on the operation of the circuit.

(3) Prior Art and Problems FIG. 1 is a diagram illustrating an example of a conventional semiconductor integrated circuit using an ECL circuit. The semiconductor device 13 is connected to the ground power supply 11 of the system via a ground line 12. The circuit drives loads 19-112 via output pins 15-18. The output pin 15 is connected to the emitter of the output transistor 14 and acts as an emitter follower. When the output transistor 14 is off, the output bin 15 is at a low level and no current flows through the resistor 19 connected to the reference voltage. When the output transistor 14 is on, the output pin 15 is at a high level, and current flows from the collector of the output transistor 14 to the emitter and through the output pin 15 to the resistor 19. This current is supplied from the ground line 12, but as the number of output pins increases, the current when all the output pins are on and when all the output pins are off becomes significantly different. On the other hand, the ground line 12 is made of, for example, a gold wire, but its resistance value is not zero. Therefore, as the current changes, the voltage drop across the ground line 12 also changes. Semiconductor integrated circuits determine the input threshold voltage, etc. based on the ground voltage (voltage at point A), but in conventional circuit configurations, the ground voltage of the integrated circuit changes due to the voltage drop in the wire, as described above. Put it away. In FIG. 2 (al), the configuration of the input stage of an ECL integrated circuit is shown with the same numbers given to the same parts as in FIG. 1 to show the influence of changes in ground voltage on the input threshold voltage. Differential circuit 21 The logical threshold voltage for is .

It is set by the reference voltage ■. V is determined by the voltage drop from the voltage VA at point A due to the resistor 23 and constant current source 22. However, the voltage at point A fluctuates depending on the output state of the circuit as described above. Therefore, the input threshold voltages vlH, v1. changes as shown in FIG. 2(b), and the input noise margin becomes small, so the logic amplitude of the circuit must be increased. In FIG. 2(b), ■ indicates a case where the output transistor is off, and ■ indicates a case where the output transistor is on. As shown in Figures 1 and 2, in conventional semiconductor integrated circuits, there are large changes in the current flowing to the ground, and fluctuations in the ground voltage due to current changes reduce the input noise margin of the semiconductor integrated circuit. had.

(4) Purpose of the Invention In view of the above-mentioned drawbacks of the prior art, it is an object of the present invention to provide a semiconductor integrated circuit with multiple output terminals in which the power supply current fluctuates less due to changes in output logic.

(5) Structure of the Invention The present invention has an output means having the ability to drive a load from an output terminal, and a reverse-sequence current generating means for creating a reverse-sequence current of the output current of the output means, and a reference voltage power supply. The present invention provides a semiconductor integrated circuit characterized in that current fluctuations at a reference voltage power supply terminal due to logic changes at the output terminal of the output means are suppressed by applying the negative phase current to the terminal.

(6) Embodiment of the Invention An embodiment of the invention will be described in detail below using two drawings.

FIG. 3 shows the E CL ft! according to the present invention. FIG. 2 is a configuration diagram of a logic circuit. Transistors 31, 32, constant current source 33, and resistors 34, 35 constitute a differential circuit. Output terminal 310~
313 is connected to the reference voltage line 320 via load resistors 314 to 317. The base of the output transistor 36 that drives the output terminal 310 is connected to the collector of the transistor 32 of the differential circuit. The collector of the other transistor 31 of the differential circuit is connected to the base of transistor 37.

The emitter of the transistor 37 is connected to an external connection terminal 39 via a resistor 38 to a reference voltage line 320 . On the other hand, the ground terminal of the integrated circuit is connected from a ground line 318 to a ground power supply 319 of the system.

When the base of the transistor 32 is fixed to the reference voltage VR, the differential circuit composed of the transistors 31 and 32 operates as follows (If the base voltage of the transistor 31 is lower than VR, the emitter of the transistor 31 and 32 The voltage is the base-emitter voltage when the transistor is on, VB.
If E, then VR-VBE. At this time transistor 3
The base-emitter voltage of transistor 32 becomes smaller than VBE, so that no base current flows and the transistor 32 is turned off. At this time, the base voltage of the transistor 36 becomes low level, and the transistor 36 is turned off. Further, the base voltage of the transistor 37 becomes high level, and the transistor 37 is turned on.

Therefore, the power supply current flowing from the ground line 318 flows into the transistor 37. Resistance 38. It flows to the reference voltage line 320 via the external connection terminal 39. Next, if the base voltage VB+ of transistor 31 is higher than VR, transistor 31.3
The emitter voltage of 2 becomes VB + - VBE, and transistor 31 is turned on.

Transistor 32 is turned off. At this time, the base voltage of the transistor 36 becomes high level, and the transistor 36
is turned on. Further, the base voltage of the transistor 37 becomes low, and the transistor 37 is turned off. Therefore, the power supply current flows through the transistor 36, the output terminal 310. Load resistance 3
14 to reference voltage line 320. In other words, in this embodiment, regardless of whether the logic of the output terminal 310 is high or low, one of the transistors 36 and 37 is on, so by appropriately setting the resistance value of the resistor 38, the ground The current flowing through line 318 can be made constant. Namely.

The voltage drop due to the ground line 31B can be made constant. Normally, the reference voltage VR input to the transistor 32 is created using the ground in the semiconductor integrated circuit as a reference, as shown in the conventional example in FIG. The input threshold voltage is constant and the operation of the two circuits is stable.Furthermore, this voltage drop can be calculated when designing a semiconductor integrated circuit, and by designing with this voltage drop in mind, the threshold voltage of the entire system can be reduced. can be adjusted, which improves the noise margin of the system.Furthermore, it is possible to design with a small logic amplitude, which can support higher speeds and lower power consumption.The logic amplitude VL of the system is as shown in Figure 2 (bl). If the threshold voltage fluctuates, it must be made twice as large as the width of the fluctuation.If there is no fluctuation, for example, when operating only in the region 1 in Fig. 2(b), VL = V I H - V I
However, when the reference voltage VR has a fluctuation range △■, VL
=VIH-vIL+2ΔV. The present invention aims to reduce this ΔV to a negligible value.

Although the embodiment shown in FIG. 3 is provided with an external connection terminal 39 connected to the reference voltage line 320, 1 the present invention is not limited to this; 2 For example, one end of the resistor 38 may be connected to the negative power supply terminals VB and H. good.

(7) As described in detail, according to the present invention, the current flowing through the ground terminal of a semiconductor integrated circuit can be made constant, so fluctuations in the threshold voltage due to fluctuations in the ground terminal current can be prevented. Particularly, even in a semiconductor integrated circuit such as an ECL circuit with a small logic amplitude voltage, there is an advantage that the two-circuit operation is stable and a semiconductor integrated circuit with a large noise margin can be constructed.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the output operation of a conventional semiconductor integrated circuit, Fig. 2 fa) is a block diagram showing the hexagonal operation of a conventional semiconductor integrated circuit, and Fig. 2 Tb) is a relational diagram showing the effect of reference voltage fluctuation. , FIG. 3 is a block diagram of an embodiment of a semiconductor integrated circuit according to the present invention. 37...transistor, 38°・°resistance. 39...External connection terminal, 318...Ground wire Figure 1 Figure 2\20 Figure 3

Claims (2)

[Claims] (1) It has an output means having the ability to drive a load from an output terminal, and a negative sequence current generating means for creating a negative sequence current of the output current of the output means, and the negative sequence current is applied to a reference voltage power supply terminal. A semiconductor integrated circuit characterized in that current fluctuations at a reference voltage power supply terminal due to a logic change at an output terminal of the output means are suppressed by adding a voltage to the output terminal. (2) The semiconductor integrated circuit according to claim 1, wherein the negative phase current generating means has a configuration corresponding to the combination of the output means and the load.