JP3237686B2 - Current switching type logic circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current switching type logic circuit used for a large scale integrated circuit (LSI) operating at a high speed.

[0002]

2. Description of the Related Art FIG. 6 shows a typical configuration of a conventional current switching type logic circuit. In the figure, the conventional circuit includes transistors Q1 and Q2, load resistors P1 and P2, and a constant current source J1. The collectors of the transistors Q1 and Q2 are connected to a common power supply VDD1 via load resistors P1 and P2, respectively. The emitters of the transistors Q1 and Q2 are connected to a power supply VSS1 via a common constant current source J1.
Connected to. Input terminals IT and IC are connected to the bases of transistors Q1 and Q2, respectively, and output terminal O is connected to the collector of transistor Q1.

The basic operation of this circuit will be described with reference to FIG. Input terminals IT and IC are differential input terminals,
The positive-phase data signal DT and the negative-phase data signal DC are input, respectively. The power supply VDD1 is grounded (0.0 V), the resistance values of the load resistors P1 and P2 are both R, and the constant current value of the constant current source J1 is I. When the positive-phase data signal DT is at the high level, the transistor Q1 is turned on and the transistor Q2 is turned off, so that the current I flows only through the transistor Q1 and the low level VOL is output to the output terminal O. That is, this circuit functions as an inverter.

Here, in order to operate this circuit at high speed and stably, it is necessary to make the resistance value R of the load resistors P1 and P2 about 1 kΩ and secure the logic amplitude VL (= I · R) about 0.4 V. is there. Therefore, the constant current value I of the constant current source J1
Must be set to 0.4 mA or more. When this circuit is used as a basic circuit and an LSI having 1000 or more current sources is operated at a power supply voltage of -4.5 V, the power consumption is 1.8 W or more.

[0005]

When operating a system incorporating the present LSI, there is a circuit block whose state does not change, or an operation of maintaining the same state of the entire LSI (hereinafter referred to as "standby operation"). )). However, the conventional circuit configuration constantly consumes constant power even in such a case, making it difficult to reduce the power consumption of the entire system.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a current switching type logic circuit which can secure the same speed and stability as a conventional circuit during operation and can reduce power consumption in a standby operation state.

[0007]

According to the present invention, a series circuit of a diode D1 and a load resistor P3 is connected to the collector of a transistor Q1 of a conventional current switching type logic circuit, and a diode D2 and a load resistor P4 are connected to a collector of a transistor Q2.
Are connected, and a common power supply V is connected to the other end of each series circuit.
Connect DD2. Further, a common constant current source C1 which is turned on / off by external control is connected to each emitter of the transistors Q1 and Q2.

Further, a load resistor P5 having a resistance value that causes a voltage drop corresponding to the ON voltage of the diodes D1 and D2 may be connected between the power supply VDD1 and the load resistors P1 and P2.

[0009] One or more transistors may be inserted in series with each of the collectors of the transistors Q1 and Q2.

[0010]

In a normal operation, a predetermined logic amplitude can be secured by turning on the constant current source C1 and turning on the diodes D1 and D2. It should be noted that a current of the same level as that of the conventional circuit flows, so that high-speed operation can be supported.

On the other hand, at the time of standby, the constant current source C1 is turned off, the diodes D1 and D2 are turned off, and a predetermined logic amplitude is secured by the load resistor P1. Here, by setting the resistance value of the load resistor P1 higher than that of the conventional circuit, power consumption during standby can be reduced.

[0012]

FIG. 1 shows the configuration of a first embodiment of a current switching type logic circuit according to the present invention. In the drawing, the circuit of this embodiment includes transistors Q1 and Q2 and load resistors P1, P2,
P3, P4, diodes D1, D2, and constant current source J1
And a constant current source C1 with a current adjusting terminal VA. The collectors of the transistors Q1 and Q2 are connected to a common power supply VDD1 via load resistors P1 and P2, respectively. Further, a series circuit of a diode D1 and a load resistor P3 is connected to the collector of the transistor Q1, and a diode D2 and a load resistor P3 are connected to the collector of the transistor Q2.
4 are connected, and a common power supply VDD2 is connected to the other end of each series circuit. In addition, transistors Q1, Q2
Are connected to a power supply VSS via a common constant current source J1.
1 and to a power supply VSS2 via a common constant current source C1 having a current adjustment terminal VA. Input terminals IT and IC are connected to respective bases of transistors Q1 and Q2, respectively, and output terminal O is connected to a collector of transistor Q1.

The basic operation of the circuit of this embodiment will be described with reference to FIGS. FIG. 2A shows an example of the output level during standby, and FIG. 2B shows an example of the output level during normal operation. FIG. 3 shows the current-voltage characteristics of the load resistor P1 (P2), the diode D1 (D2) and the load resistor P3 (P
4 shows a current-voltage characteristic of the series circuit of 4).

A positive-phase data signal DT is input to an input terminal IT, and a negative-phase data signal DC is input to an input terminal IC. The power supply VDD1 and the power supply VDD2 are grounded (0.0
V), the resistance values of the load resistors P1 and P2 are both RS, the resistance values of the load resistors P3 and P4 are both RN, and the constant current source J
1 is the constant current value of IS, and the constant current value of the constant current source C1 is I
N · DA. Here, DA is 0 or 1, and is input from the current adjustment terminal VA.

First, the operation at the time of standby will be described. DA = 0 is supplied from the current adjustment terminal VA to turn off the constant current source C1. The logic amplitude VLS (=
IS · RS = 0.4V) is designed to be smaller than the ON voltage VD (の 1.0V) of the diodes D1 and D2. That is, the diodes D1 and D2 are turned off during standby. The constant current value IS of the constant current source J1 is 0.04 mA, and the load resistance P
1, the resistance value RS of P2 is 10 kΩ. At this time, the high level (VOHS) taken out to the output terminal O is VDD1
(= 0.0 V), and the low level (VOLS) is VDD1
−VLS (= −0.4 V). Thus, the logic amplitude VLS of the circuit of this embodiment can maintain 0.4 V, and the circuit operates stably as long as a fixed signal is input. In this embodiment, the constant current value IS of the constant current source J1 is designed to be 1/10 that of the conventional circuit, and the power consumption during standby is 1/10 of that of the conventional circuit.

Next, the normal operation will be described. DA = 1 is supplied from the current adjustment terminal VA to turn on the constant current source C1. The constant current value IN of the constant current source C1 is 0.36 mA.
(IS + IN = 0.4 mA), the resistance value RN of the load resistors P3 and P4 is 1 kΩ, and the on-resistance of the diodes D1 and D2 is zero. Since the transistor Q1 or Q2 is turned on, the cathode of the diode D1 or D2 is connected to VDD.
The potential of 2-VD is maintained. At this time, the high level (VOHN) taken out to the output terminal O is VDD2-VDD (= -1.
0 V), and the low level (VOLN) is VDD2-VD
−VLN (= −1.4 V). Logical amplitude VLN (= R
N. (IS + IN)) is 0.4 V, and a current of 0.4 mA flows through the collector of the transistor Q1 or Q2, so that high-speed operation and stable operation can be ensured.

FIG. 4 shows the configuration of a second embodiment of the current switching type logic circuit of the present invention. In the drawing, the circuit of the present embodiment has the same configuration as that of the first embodiment, except that
This is a configuration in which a load resistor P5 is inserted between the first and P2.
The other parts are the same as those of the first embodiment, and the corresponding parts are denoted by the same reference numerals.

The basic operation of the circuit will be described. The configuration of the signal, power supply and load is the same as in the first embodiment. The normal operation is not affected by the load resistance P5, and is the same as that of the first embodiment. Hereinafter, the operation at the time of standby will be described.

It is assumed that the resistance value R5 of the load resistor P5 is VD / IS, and that VDD1 = VDD2. Transistor Q1 or Q
Since 2 is turned on, a voltage drop of VD occurs at the load resistance P5. Therefore, the high level (VOHS) taken out to the output terminal O becomes VDD1-VD, and the low level (VOLS) becomes VDD1-VD-VLS, and the high level and the low level coincide with those in the normal operation. If the high level and the low level are the same at the time of standby and at the time of normal operation, unnecessary charging and discharging are eliminated, and the device is more suitable for high-speed operation.

FIG. 5 shows the configuration of a third embodiment of the current switching type logic circuit according to the present invention. In the drawing, the circuit of the present embodiment is different from that of the first embodiment in that one or more transistor groups T1 are inserted in series with the collector of the transistor Q1 and one or more transistor groups T2 are inserted in series with the collector of the transistor Q2. I do. The other parts are the same as those of the first embodiment, and the corresponding parts are denoted by the same reference numerals. In addition,
The configuration of this embodiment can be applied to the second embodiment.

In the circuit of this embodiment, the power supplies VSS1 and VSS2 are adjusted, and a signal for turning on each transistor when the transistors Q1 and Q2 are on is supplied to the bases of the transistor groups T1 and T2. This realizes a logical operation based on whether or not current flows through the load resistors P1 to P5 and the diodes D1 and D2 when the transistors Q1 and Q2 are turned on and off by the input data signal. Therefore, the normal operation and the standby operation are the same as those of the first and second embodiments.

In the first to third embodiments,
Since the diodes D1 and D2 and the load resistors P3 and P4 may form a series circuit, the connection between the diodes and the load resistors may be reversed.

Although the transistors Q1 and Q2 of the first to third embodiments have been described as bipolar transistors, the transistors Q1 and Q2 can be similarly operated by using a field effect transistor. In that case, the collector corresponds to the drain, the base corresponds to the gate, and the emitter corresponds to the source.

[0024]

As described above, the current switching type logic circuit according to the present invention can operate at a high speed because the same current flows as the conventional circuit during operation.

On the other hand, at the time of standby in which the same state is maintained, power consumption can be reduced according to the resistance value of the load resistance. Note that the logic amplitude can be kept constant even when the constant current source current changes between operation and standby, so that a noise margin can be secured even during standby.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a first embodiment of a current switching type logic circuit of the present invention.

FIG. 2 is a diagram illustrating an example of an output level of the circuit according to the first embodiment.

FIG. 3 is a diagram showing current-voltage characteristics of each load of the circuit of the first embodiment.

FIG. 4 is a circuit diagram showing a configuration of a second embodiment of the current switching type logic circuit of the present invention.

FIG. 5 is a circuit diagram showing a configuration of a third embodiment of the current switching type logic circuit of the present invention.

FIG. 6 is a circuit diagram showing a typical configuration of a conventional current switching type logic circuit.

FIG. 7 is a diagram showing an example of an output level of a conventional circuit.

[Explanation of symbols]

 Q1, Q2 Transistors D1, D2 Diodes P1 to P5 Load resistance J1, C1 Constant current source VA Current adjustment terminal VDD1, VDD2, VSS1, VSS2 Power supply IT, IC input terminal O Output terminal T1, T2 Transistor group

Claims (3)

(57) [Claims] A common power supply VDD1 is connected to respective collectors of transistors Q1 and Q2 via load resistors P1 and P2, respectively.
Are connected, a common constant current source J1 is connected to each emitter of the transistors Q1 and Q2, and the transistors Q1 and Q2
Input terminals IT and IC are connected to each base of
In a current switching type logic circuit in which an output terminal O is connected to a collector of a transistor Q1, a series circuit of a diode D1 and a load resistor P3 is connected to a collector of the transistor Q1,
2 is connected to a series circuit of a diode D2 and a load resistor P4, the other end of each series circuit is connected to a common power supply VDD2, and the emitters of the transistors Q1 and Q2 are turned on and off by external control. A current switching type logic circuit, wherein a source C1 is connected. 2. The current switching type logic circuit according to claim 1, wherein a load having a resistance value that causes a voltage drop corresponding to the ON voltage of the diodes D1 and D2 is provided between the power supply VDD1 and the load resistors P1 and P2. A current switching type logic circuit, wherein a resistor P5 is connected. 3. The current switching type logic circuit according to claim 1, wherein one or more transistors are inserted in series with each of the collectors of the transistors Q1 and Q2. Type logic circuit.