JPS6010679A - Semiconductor memory - Google Patents

Abstract

PURPOSE:To reduce the occurrence of an improper memory volatilization due to defective manufacture in a semiconductor memory having a floating gate by forming the gate through an insulating film in a double structure. CONSTITUTION:The floating gate 2 of a semiconductor memory having a control gate 1, a floating gate 2, a channel section 3, a drain 4, a source 5, a surface protective film 6, an interlayer insulating film 7, a gate oxidized film 8, a field oxidized film 9, and a silicon substrate 10 is formed in a structure that the film 11 is interposed between two layers 2a and 2b. Part of hot electrons generated by avalanche passes in the film 8 by an electric field generated by the gate 1 in the depletion layer region near the drain 4, and stored in the gates 2a, 2b. The charges stored in the both floating gates are provided to operate a transistor even solely.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor memory device that stores information by accumulating hot electrons generated by avalanche breakdown in a floating gate.

Figures 1, 2, and 3 show conventional devices of this type, with Figure 1 being a plan view, Figure 2 being a lateral sectional view of Figure 1, and Figure 3 being a cross-sectional view of Figure 1. FIG. 2 is a longitudinal cross-sectional view of FIG. 1; In these figures, 1 is a control gate, 2 is a floating gate, 3 is a channel part, 4 is a tunnel part, 5 is a source, and 6
7 is a surface protection film, 7 is an interlayer insulating film, 8 is a gate oxide film, 9 is a
11 is a field oxide film, and 10 is a silicon substrate.

Next, the operation will be explained.

A part of the hot enctrons generated by avalanche breakdown in the depletion layer region near the tunnel 4 overcomes the energy barrier of the interface between the silicon substrate 10 and the gate oxide film 8 and is absorbed into the gate oxide film 8 formed by the control gate 1. It flows through the gate oxide film 8 due to the electric field, falls to the floating gate 2, and is accumulated. The floating gate 2 includes an interlayer insulating film 7 and a gate oxide film 8.
Since it is completely insulated from the outside by
Cutrons remain stable for long periods of time and have memory functions. In an actual storage device, information is stored in a state in which hot enctrons are accumulated in the floating gate 2 (data write state) and in an empty state (erased state).

Since the conventional semiconductor memory device is configured as described above, in order to improve the memory retention characteristics, it is necessary to improve the insulation properties of the interlayer insulating film 7 and the gate oxide film 8 around the floating gate 2. If the insulation properties deteriorate due to manufacturing defects, the memory retention properties will also deteriorate.

This invention was made to eliminate the drawbacks of the conventional devices as described above, and by forming the floating gate into a two-layer structure, it is possible to reduce the occurrence of memory volatilization failures caused by manufacturing defects. The purpose is to provide a semiconductor memory device. An embodiment of this invention is shown below in Figs.
This will be explained with reference to FIG.

In FIG. 4, the same symbols as in FIGS. 1 to 3 indicate the same parts, 2a and 2b are lower and upper floating gates,
As shown in Figures 5A and 6, it has a two-layer structure with an insulating film 11 sandwiched between them, and the insulating film 11 separates the floating goo (2a) on the lower side and the floating goo (2b) on the upper side. ing.

The structure is the same as that of the conventional device except that each floating goo (2a, 2b) has a two-layer structure.

Next, the operation will be explained.

In the depletion layer region near Tongin 4, avalanche breakdown occurs,
It falls and accumulates in the lower floating goo) 2a and the upper floating goo) 2b. The amounts of charge stored in the lower floating gate 2a and the upper floating gate 2b are designed so that the transistor can operate sufficiently even when they exist alone.

As a result, even if the insulation properties of the gate oxide film 8 deteriorate due to manufacturing defects and the memory retention characteristics of the lower floating gate 2a deteriorate, as long as there is no problem with the memory retention characteristics of the upper floating gate 2b. , the storage device as a whole is expected to have good memory retention characteristics.

In addition, the insulation properties of the interlayer insulating film 7 are reduced due to manufacturing defects,
Even if the memory retention characteristics of the upper floating gate 2b deteriorate, the lower floating gate 2a can similarly prevent the characteristics of the entire device from deteriorating.

In the above embodiment, the shapes of the lower floating goo (2a) and the upper floating goo (2b) were made the same, but in order to adjust the amount of accumulated charge on the upper and lower sides, "'" and "゛" were added to the shapes. ”°1 As explained above, this invention has a floating gate with a two-layer structure with an insulating film interposed between them, providing redundancy to the operation of the memory device, which not only improves reliability but also improves yield. It also has the effect of improving

[Brief explanation of drawings]

1 to 3 are plan views showing conventional semiconductor memory devices;
4 to 6 are a plan view, a horizontal sectional view, and a vertical sectional view of a semiconductor memory device showing a seventh embodiment of the present invention. In the figure, 1 is a control gate, 2a is a lower floating gate, 2b is an upper floating gate, 3 is a channel part, 4 is a tunnel, 5 is a source, 6 is a surface protection film, 7 is an interlayer insulating film, and 8 is a A gate oxide film, 9 a field oxide film, 10 a silicon substrate, and 11 an insulating film. Note that the same reference numerals in the figures indicate the same or corresponding parts. Agent Masuo Oiwa (2 others) Figure 1 Figure 2 Figure 4 Figure 5 Figure 3 Figure 6

Claims (1)

[Claims] A semiconductor memory device that stores information by accumulating true enctronic energy in a floating gate caused by avalanche breakdown, wherein the floating gate has a two-layer structure with an insulating film interposed therebetween.