JPS601052U - FM receiver - Google Patents
FM receiverInfo
- Publication number
- JPS601052U JPS601052U JP8402583U JP8402583U JPS601052U JP S601052 U JPS601052 U JP S601052U JP 8402583 U JP8402583 U JP 8402583U JP 8402583 U JP8402583 U JP 8402583U JP S601052 U JPS601052 U JP S601052U
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- generating means
- synchronizing signal
- signal generating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Noise Elimination (AREA)
- Circuits Of Receivers In General (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の一実施例の構成を示すブロック図。
1・・・・・・フロントエンド、2・・・・・・中間周
波段、3・・・・・・FM復調器、11,12.13お
よび14・・・・・・加算器、16・・・・・・2乗回
路、17・・・・・・3乗回路、18.19.20およ
び21・・・・・・微分回路、22゜23.24および
25・・・・・・レベル制御回路、31・・・・・・同
期信号発生回路、32・・・・・・2逓倍回路、33・
・・・・・3逓倍回路、34および35・・・・・・移
相回路、36,37.38および39・・・・・・乗算
器、40.41.42および43・・・・・・ローパス
フィルタ。FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. 1...Front end, 2...Intermediate frequency stage, 3...FM demodulator, 11, 12.13 and 14...Adder, 16... ...square circuit, 17...cube circuit, 18.19.20 and 21...differentiation circuit, 22°23.24 and 25...level Control circuit, 31...Synchronization signal generation circuit, 32...2 multiplier circuit, 33.
... Triple multiplier circuit, 34 and 35 ... Phase shift circuit, 36, 37.38 and 39 ... Multiplier, 40.41.42 and 43 ...・Low pass filter.
Claims (1)
路と、n乗回路の出力を微分する微分回路と、レベル制
御された微分回路の出力とFM復調出力とを合成する合
成回路と、FM復調出力中のまたは合成回路中の角周波
数pなるパイロット信号に同期した角周波数npの同期
信号を発生する同期信号発生手段と、同期信号発生手段
の出力または同期信号発生手段の出力を90度移相した
出力と同期信号発生手段の入力とを同期検波する同期検
波回路と、同期検波回路の出力に対応して微分回路の出
力レベルを制御するレベル制御回路とを備えてなること
を特徴とするFM受信機。An n-th power circuit that raises the FM demodulation output to the nth power (n is a natural number of 2 or more), a differentiation circuit that differentiates the output of the n-th power circuit, and a synthesis circuit that combines the level-controlled output of the differentiation circuit and the FM demodulation output. , a synchronizing signal generating means for generating a synchronizing signal with an angular frequency np synchronized with a pilot signal having an angular frequency p in the FM demodulation output or in the synthesis circuit; and an output of the synchronizing signal generating means or an output of the synchronizing signal generating means. The present invention includes a synchronous detection circuit that synchronously detects the 90-degree phase-shifted output and the input of the synchronous signal generating means, and a level control circuit that controls the output level of the differentiating circuit in response to the output of the synchronous detection circuit. Features FM receiver.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8402583U JPS601052U (en) | 1983-06-03 | 1983-06-03 | FM receiver |
US06/596,524 US4561113A (en) | 1983-04-09 | 1984-04-04 | Distortion canceller for FM receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8402583U JPS601052U (en) | 1983-06-03 | 1983-06-03 | FM receiver |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS601052U true JPS601052U (en) | 1985-01-07 |
JPS6324675Y2 JPS6324675Y2 (en) | 1988-07-06 |
Family
ID=30213982
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8402583U Granted JPS601052U (en) | 1983-04-09 | 1983-06-03 | FM receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS601052U (en) |
-
1983
- 1983-06-03 JP JP8402583U patent/JPS601052U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6324675Y2 (en) | 1988-07-06 |
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