JPS60105291A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS60105291A
JPS60105291A JP21364283A JP21364283A JPS60105291A JP S60105291 A JPS60105291 A JP S60105291A JP 21364283 A JP21364283 A JP 21364283A JP 21364283 A JP21364283 A JP 21364283A JP S60105291 A JPS60105291 A JP S60105291A
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit device
hybrid integrated
conductive
circuit boards
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21364283A
Other languages
Japanese (ja)
Inventor
冨士 昌章
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP21364283A priority Critical patent/JPS60105291A/en
Publication of JPS60105291A publication Critical patent/JPS60105291A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は集積度全同上させた混成集積回路装置に関する
DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to a hybrid integrated circuit device having a complete degree of integration.

〔従来技術〕[Prior art]

混成集積回路装置は一般には、回路導体や抵抗等の受動
素子を絶縁基板上に形成した集積回路板に回路部品を搭
載して構成される・ 最近、小型で集積度の同上1に混成集積回路装置の要求
が多くなるにつれ第1図に示すような1枚の集積回路板
1の表面及び裏面に、半導体集積回路素子2(以下IC
素子と記す)、チップコンデンサ3.トランジスタやダ
イオード等の小型モールド部品4等からなる回路部品を
搭載したものが作られている。しかしながら、1枚の絶
縁基板1の両面に回路導体や受動素子全形成することは
製造工程が複雑となるため歩留りが悪く、集積回路板は
極めて高価なものとなり不都合である。更に集積回路板
1の両面にIC素子2′f、取付けるのはIC素子2を
保護するための特別な支持型等を必要とするため極めて
困難である・尚5はリード端子である。
Hybrid integrated circuit devices are generally constructed by mounting circuit components on an integrated circuit board in which passive elements such as circuit conductors and resistors are formed on an insulating substrate.Recently, hybrid integrated circuits are becoming more and more compact and highly integrated. As the demands for devices increase, semiconductor integrated circuit elements 2 (hereinafter referred to as ICs) are placed on the front and back surfaces of a single integrated circuit board 1 as shown in FIG.
(referred to as element), chip capacitor 3. Products are manufactured that are equipped with circuit components consisting of small molded components 4 such as transistors and diodes. However, forming all circuit conductors and passive elements on both sides of a single insulating substrate 1 complicates the manufacturing process, resulting in poor yields and making the integrated circuit board extremely expensive, which is disadvantageous. Furthermore, it is extremely difficult to attach the IC elements 2'f to both sides of the integrated circuit board 1 because it requires a special support mold to protect the IC elements 2. Reference numeral 5 is a lead terminal.

この対末として第2図に示すように、回路部品を搭載し
た2枚の集積回路板1a、lb’iはり合せ、対向する
各集積回路板1a、tbのスルホール6内に導通ピン7
全通し電気的に接続して混成集積回路装置を製造する方
法が用いられてきている、しかしこの方法で製造した混
成集積回路装置においては2枚の集積回路板を接続する
ために導通ビン7を用いており、このためスルーホール
6の孔径が大きくなると共に、導通ビン7の半田付は領
域全必要とすることから集積度を向上させることができ
ないという欠点がある。更Vc導通ピン7の集積回路板
への半田付けは手作業で行なわなければならないため能
率が悪く、半田付は不良が生じ易いという欠点もある。
As shown in FIG. 2, the two integrated circuit boards 1a, lb'i on which circuit components are mounted are glued together, and a conductive pin 7 is inserted into the through hole 6 of each of the opposing integrated circuit boards 1a, tb.
A method of manufacturing a hybrid integrated circuit device by electrically connecting the two integrated circuit boards has been used.However, in the hybrid integrated circuit device manufactured by this method, a conductive pin 7 is used to connect two integrated circuit boards. For this reason, the diameter of the through hole 6 becomes large, and the soldering of the conductive bottle 7 requires the entire area, so there is a drawback that the degree of integration cannot be improved. Furthermore, soldering of the Vc conduction pin 7 to the integrated circuit board must be done manually, which is inefficient, and soldering is also disadvantageous in that it is prone to defects.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上記欠点を除去し、低価格で集積度の
向上した信頼性の高い混成集積回路装置を提供すること
にある。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks, and to provide a highly reliable hybrid integrated circuit device with an improved degree of integration at a low cost.

〔発明の構成〕[Structure of the invention]

本発明の混成集積回路装置は表面に回路部重金搭載し裏
面をはり合せた2枚の集積回路板からなり、この2枚の
集積回路板の対向する位置にそれぞれ設けられたスルー
ホール内の導電体スルーホール上に設けられた導電性物
質により接続されて構成される。
The hybrid integrated circuit device of the present invention is comprised of two integrated circuit boards with heavy circuit parts mounted on the front surface and their back surfaces glued together. They are connected by a conductive material provided on the body through-hole.

〔実施例の説明〕 次に、不発明の実施例を図面を用いて説明する。[Explanation of Examples] Next, embodiments of the present invention will be described with reference to the drawings.

第3図は不発明の一実施例の断面図である。FIG. 3 is a sectional view of one embodiment of the invention.

回路導体や抵抗等の受動素子が形成された2枚の集積回
路板1a、1bの表面にはIC素子2゜チップコンデン
サ3.小型モールド部品4等の回路部品が搭載されてい
る・そしてこの2枚の集積回路板1a、1b(D裏面は
はり合されており、端部に接続されたリード端子5によ
り固定されている。更にこの2枚の集積回路板1a、l
bの対向する位置にそれぞれ設けられたスルーホール内
の導電体8.8′はスルーホール上に設けられた導電性
物質9によ)電気的に接続されている。
On the surfaces of two integrated circuit boards 1a and 1b on which passive elements such as circuit conductors and resistors are formed, there are IC elements 2.degree. chip capacitors 3. Circuit components such as small molded components 4 are mounted on these two integrated circuit boards 1a and 1b (D back surfaces are glued together and fixed by lead terminals 5 connected to the ends). Furthermore, these two integrated circuit boards 1a, l
The conductors 8, 8' in the through holes provided at opposite positions of b are electrically connected by conductive material 9 provided on the through holes.

この導電性物質としては導電性ペーストや導電性薄模を
用いることができる。導電性ペーストを用いる場合は、
回路部品を搭載した集積回路板の裏面のスルーホール上
に導電性ペースH−印刷法等により設け、2枚の集積回
路板をはり合せたのち約150’0.30分間の熱処理
を行ない揮発性物質を除去する。その後リード端子を取
付けて2枚の集積回路板を固定し混成集積回路装置を完
成させる。
As this conductive substance, a conductive paste or a conductive thin pattern can be used. When using conductive paste,
A conductive paste is formed on the through-holes on the back side of the integrated circuit board on which circuit components are mounted by H-printing method, etc., and after the two integrated circuit boards are glued together, heat treatment is performed for about 150 minutes and 0.30 minutes to make it volatile. remove the substance; After that, lead terminals are attached and the two integrated circuit boards are fixed to complete the hybrid integrated circuit device.

このように構成された混成集積回路装置においては、上
下の集積回路板の接続全導電性物質を介して各対向する
スルーホール内の導電体により行っていることから、従
来用いられていた導通ビンと、その半田付のための領域
が不要となるため集積度が同上する。更に手作業にょる
導通ビンの半田付がなくなるため信頼性が同上すると共
に歩留りが改善される。
In a hybrid integrated circuit device configured in this way, the connection between the upper and lower integrated circuit boards is made by conductors in each opposing through-hole through a conductive material. Since no area is required for soldering, the degree of integration increases. Furthermore, since manual soldering of the conductive bottle is no longer required, reliability is improved and yield is improved.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明したように、不発明によれは、2枚の集
積回路板の裏面をはり合せ、スルホール内の導電体を導
電性物質によ、!ll接続することがら、低価格で集積
度及び信頼性の向上した混成集積回路装置が得られるの
でその効果は大きい・
As explained in detail above, in accordance with the invention, the back sides of two integrated circuit boards are glued together, and the conductors in the through holes are filled with a conductive material! ll connection, it is possible to obtain a hybrid integrated circuit device with improved integration and reliability at a low cost, so the effect is large.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の混成集積回路装置の一例の〜[面図、第
2図は従来の混成集積回路装置の他の例の断面図、第3
図は本発明の一実施例の断面図である。 1.1a、 1b・・・・・・集積回路板、2・・・・
・・IC素子、3・・・・・・チップコンデンサ% 4
・・・・・・小型モールド部品、訃・・・・・リード端
子、6・・・・・・スルーホール、7・・・・・・導通
ビン、8.8’・・・・・・導電体、9・出・・導電性
物質。
Figure 1 is a side view of an example of a conventional hybrid integrated circuit device, Figure 2 is a sectional view of another example of a conventional hybrid integrated circuit device, and Figure 3 is a cross-sectional view of another example of a conventional hybrid integrated circuit device.
The figure is a sectional view of one embodiment of the present invention. 1.1a, 1b... integrated circuit board, 2...
...IC element, 3...Chip capacitor% 4
・・・・・・Small molded parts, Bottom: Lead terminal, 6: Through hole, 7: Conductive bottle, 8.8': Conductive Body, 9. Output: Conductive substance.

Claims (1)

【特許請求の範囲】[Claims] 表面に回路部品を搭載した2枚の集積回路板の裏面をは
力合せて構成される混成集積回路装置において、前記2
枚の集積回路板の対向する位置にそれぞれ設けられたス
ルーホール内の導電体は該スルーホール上に設けられた
導電性物質により接続されていることを特徴とする混成
集積回路装置。
In a hybrid integrated circuit device constructed by joining the back surfaces of two integrated circuit boards with circuit components mounted on the front surfaces, the above-mentioned 2.
1. A hybrid integrated circuit device, characterized in that conductors in through holes provided at opposing positions of two integrated circuit boards are connected by a conductive material provided on the through holes.
JP21364283A 1983-11-14 1983-11-14 Hybrid integrated circuit device Pending JPS60105291A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21364283A JPS60105291A (en) 1983-11-14 1983-11-14 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21364283A JPS60105291A (en) 1983-11-14 1983-11-14 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS60105291A true JPS60105291A (en) 1985-06-10

Family

ID=16642529

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21364283A Pending JPS60105291A (en) 1983-11-14 1983-11-14 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS60105291A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6276561U (en) * 1985-10-31 1987-05-16

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6276561U (en) * 1985-10-31 1987-05-16

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