JPS6010348A - Connection test system - Google Patents
Connection test systemInfo
- Publication number
- JPS6010348A JPS6010348A JP58118894A JP11889483A JPS6010348A JP S6010348 A JPS6010348 A JP S6010348A JP 58118894 A JP58118894 A JP 58118894A JP 11889483 A JP11889483 A JP 11889483A JP S6010348 A JPS6010348 A JP S6010348A
- Authority
- JP
- Japan
- Prior art keywords
- information
- reading
- devices
- storage device
- storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
Abstract
Description
【発明の詳細な説明】
(1)発明の技術分野
本発明は一つの共通バスに接続されている複数の装置の
接続状態を簡潔に試験する方式に関する。DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a method for simply testing the connection status of a plurality of devices connected to one common bus.
(2)従来技術と問題点
従来は第1図に示すように一つの共通バスBUSに複数
の装置TMI〜TMnが接続されているシステムにおい
て、装置とバスの接続されていることの確認を動作開始
前などに行う必要がある。(2) Prior art and problems Conventionally, in a system in which multiple devices TMI to TMn are connected to one common bus BUS as shown in Figure 1, confirmation of the connection between the devices and the bus has been performed. This must be done before starting.
そのため中央処理装置CPUは各装置TMI〜TMnに
対し、順次に書込み系命令を実行して書込みを行い、次
に順次に読取り系命令を実行し読取る。各装置からの返
送情報により接続のm認を行っている。読取りは書込み
の直後に行い個別毎の接続確認を行うこともあるが、何
れの場合も端末の数が多くなると接続試験に要する時間
が多大となる欠点があった。Therefore, the central processing unit CPU sequentially executes write-related instructions to write to each device TMI to TMn, and then sequentially executes read-related instructions to read. The connection is verified based on the information returned from each device. Reading may be performed immediately after writing and connection confirmation for each individual terminal may be performed, but in either case, there is a drawback that the connection test requires a large amount of time when the number of terminals increases.
(3)発明の目的
本発明の目的は前述の欠点を改善し、簡潔に接続状態を
試験する方式を提供することにある。(3) Purpose of the Invention The purpose of the present invention is to improve the above-mentioned drawbacks and to provide a method for simply testing the connection state.
(4)発明の構成
前述の目的を達成するための本発明の構成は、一つの共
通ハスに複数の装置と中央処理装置が接続されているシ
ステムにおける装置が、前記共通バスと接続されている
か否か試験する方式において、前記複数装置には各々固
定情報格納レジスタを設け、更に共通バスと接続された
前記レジスタ情報の読取・保持装置を具備し、中央処理
装置からの単一指令により読取・保持装置を動作させて
、接続試験を行うことである。(4) Structure of the Invention The structure of the present invention for achieving the above-mentioned object is that devices in a system in which a plurality of devices and a central processing unit are connected to one common bus are connected to the common bus. In this method, each of the plurality of devices is provided with a fixed information storage register, and is further equipped with a device for reading and holding the register information connected to a common bus. This is to operate the holding device and perform a connection test.
(5)発明の実施例
第2図は本発明の一実施例の構成を示すブロック図であ
る。第2図において第1図と同一符号は同様のものを示
す。RGI〜RGnは固定情報格納レジスタで各装置に
設けられたもの。RHは情報の読取・保持装置で共通バ
スBUSと接続され且つ前記面情報格納レジスタの情報
を読取・保持する装置である。中央処理装置は各装置の
接続状態のチェックを開始するとき、情報読取・保持装
置RHに対し、各装置TMの固定情報の読取りを単一指
令により指示する。情報読取・保持装置RHは該指示に
より、各装置TMI〜TMnに対し固定情報送出指示を
発する。各装置TM 1−TMnは固定情報格納レジス
タRGI〜RGnの格納情報を返送する。情報読取・保
持装置RHは自己の返送情報格納メモリMMに格納する
。全装置からの返送情報が収集されたとき、中央処理装
置CPUに対し終了報告を送出する。中央処理装置は適
宜のとき情報読取保持装置RH内の返送情報格納メモリ
の内容を確認し、各装置TMI〜TMnの接続状態を試
験する。(5) Embodiment of the Invention FIG. 2 is a block diagram showing the configuration of an embodiment of the invention. In FIG. 2, the same reference numerals as in FIG. 1 indicate the same parts. RGI to RGn are fixed information storage registers provided in each device. RH is an information reading/holding device that is connected to the common bus BUS and reads and holds the information in the surface information storage register. When the central processing unit starts checking the connection status of each device, it instructs the information reading/holding device RH to read the fixed information of each device TM by a single command. Based on the instruction, the information reading/holding device RH issues a fixed information sending instruction to each device TMI to TMn. Each of the devices TM1-TMn returns the information stored in the fixed information storage registers RGI-RGn. The information reading/holding device RH stores the returned information in its own return information storage memory MM. When return information from all devices is collected, a completion report is sent to the central processing unit CPU. The central processing unit checks the contents of the return information storage memory in the information reading and holding device RH at an appropriate time, and tests the connection state of each device TMI to TMn.
(6)発明の効果
このようにして本発明によると、中央処理装置は所定の
指示を送出するのみで、全装置の接続状態を試験するこ
とができるため、試験の処理手順が簡便になり、急ぎの
処理を遅延させずに可能となるなど、多数の装置を接続
しているシステムのとき好適である。(6) Effects of the Invention In this manner, according to the present invention, the central processing unit can test the connection status of all devices by simply sending out a predetermined instruction, so the test processing procedure is simplified. This is suitable for systems that connect a large number of devices, as it enables urgent processing without delay.
第1図は従来の共通バス使用の接続試験方式を説明する
図、
第2図は本発明の一実施例の構成を示すブロック図であ
る。
TM 1〜TM n−装置 BUS−共通バスCP U
−中央処理装置
RGI〜RGn−固定情報格納レジスタRH−−−情報
の読取・保持装置
MM−返送情報格納メモリ
特許出願人 富士通株式会社
代理人 弁理士 鈴木栄祐FIG. 1 is a diagram explaining a conventional connection test method using a common bus, and FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention. TM 1 to TM n-device BUS-common bus CPU
-Central processing units RGI to RGn -Fixed information storage register RH---Information reading/holding device MM -Return information storage memory Patent applicant Fujitsu Limited Agent Patent attorney Eisuke Suzuki
Claims (1)
ているシステムにおける装置が、前記共通バスと接続さ
れているか否か試験する方式において、前記複数装置に
は各々固定情報格納レジスタを設け、更に共通バスと接
続された前記レジスタ情報の読取・保持装置を具備し、
中央処理装置からの単一指令により読取・保持装置を動
作させて、接続試験を行うことを特徴とする接続試験方
式。In a method for testing whether a device in a system in which a plurality of devices and a central processing unit are connected to one common bus is connected to the common bus, each of the plurality of devices is provided with a fixed information storage register, further comprising a device for reading and holding the register information connected to a common bus;
A connection test method that performs a connection test by operating a reading/holding device based on a single command from a central processing unit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58118894A JPS6010348A (en) | 1983-06-30 | 1983-06-30 | Connection test system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58118894A JPS6010348A (en) | 1983-06-30 | 1983-06-30 | Connection test system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6010348A true JPS6010348A (en) | 1985-01-19 |
Family
ID=14747785
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58118894A Pending JPS6010348A (en) | 1983-06-30 | 1983-06-30 | Connection test system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6010348A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5057676A (en) * | 1989-08-08 | 1991-10-15 | Sharp Kabushiki Kaisha | Portable electronic apparatus |
JPH0612550U (en) * | 1991-09-24 | 1994-02-18 | 古橋 信行 | Double opening bucket for power shovel |
-
1983
- 1983-06-30 JP JP58118894A patent/JPS6010348A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5057676A (en) * | 1989-08-08 | 1991-10-15 | Sharp Kabushiki Kaisha | Portable electronic apparatus |
JPH0612550U (en) * | 1991-09-24 | 1994-02-18 | 古橋 信行 | Double opening bucket for power shovel |
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