JPS5995706A - Amplifier - Google Patents

Abstract

PURPOSE:To attain a high DC stability and an inexpensive circuit constitution by providing the 2nd operational amplifier whose positive and negative power supply terminals are connected in common to positive and negative power supply terminals of the 1st operational amplifier and which integrates an output of a boost circuit. CONSTITUTION:If a DC signal level of an output signal e0 is drifted positive due to any cause, since the 2nd operational amplifier 15 integrates the signal e0 by a CR time constant, an output voltage of the amplifier 15 is moved to negative polarity. As a result, since the current of a negative power supply terminal 15 is increased, a current of a resistor 28b and a collector current of a transistor 31b are increased by the increment, the collector voltage is moved to negative polarity and a DC signal level of the signal e0 is restored to zero. When the DC signal level of the signal e0 is drifted negatively, the current at a positive power supply terminal 15a of the amplifier 15 is increased and the DC signal level is restored to zero.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an amplifier configured by adding a boost circuit to an operational amplifier, and particularly to an amplifier that improves DC stability and reduces cost.

As this type of amplifier, those shown in FIGS. 1 and 2 are conventionally known. The amplifier shown in FIG. 1 includes an operational amplifier 1 that noninverts amplifies an input signal using a low power supply voltage ±V], l, and an operational amplifier 1 that further increases the output of the operational amplifier 1 using a high power supply voltage ±vH. a boost circuit 2,
An amplifying section including a feedback resistor 3 that negatively feeds back the output of the boost circuit 2 to the input side of the operational amplifier 10 includes an integrating circuit 4 for detecting the DC signal level of the output signal of the boost circuit 2; A DC servo circuit 6 comprising an inverting amplifier circuit 5 which inverts the output of the integrating circuit 4 and supplies the inverted signal to the input side of the operational amplifier 1 is provided. According to this amplifier, the maximum output signal is approximately 2V.
A high output signal of H (P-P) can be obtained, and high DC stability can be obtained. By the way, in this amplifier, the level shift of the amplified signal from the operational amplifier 1 to the boost circuit 2 is performed using a resistor 7.8 a% 9
A (or resistors 7, Bb, 9b) and a bypass circuit are used. Therefore, in this amplifier, the slew rate is
It was determined by the voltage drive ability of
There was a problem that the value was generally not very large.

This amplifier also has the problem that the number of parts in the DC servo circuit 6 increases.

The amplifier shown in FIG. 2 also includes an operational amplifier 11 to which an input signal is supplied to a non-inverting input terminal, and an operational amplifier 11
The boost circuit 12 is driven by a current flowing through the positive power supply terminal 11a and the negative power supply terminal 11b, respectively, a feedback resistor 3, and a DC servo circuit 6.

According to this amplifier, the boost circuit 12 is connected to the operational amplifier 1
Therefore, even if the operational amplifier 11 has the same performance as the operational amplifier 1 shown in Fig. 1, it will have a higher slew rate than the amplifier shown in Fig. 1. can be obtained. However, in this amplifier, the power supply terminals 11a and 111b of the operational amplifier 11 are treated as signal terminals, so an element housed in one package must be used alone as the operational amplifier 11, and the DC servo circuit Since a power supply voltage must be separately supplied to each of the 6 operational amplifiers, there is a problem in that the cost is high. That is, when using a plurality of operational amplifiers, for example, two operational amplifiers 1 are included in one package 13 as shown in FIG.
It is economical to use an element (a so-called dual operational amplifier) in which the operational amplifier 14. It has become common. Therefore, in the amplifier shown in FIG. 2, by using such elements, for example, the operational amplifier 11 and the operational amplifier in the DC servo circuit 6 can be constructed in one package at a low cost. That's not possible.

This invention was made in view of the above circumstances, and its purpose is to realize an amplifier in which a boost circuit is added to an operational amplifier with extremely high DC stability and an inexpensive circuit configuration. .

The present invention is characterized by a first operational amplifier whose input terminal is supplied with a signal to be amplified, and which amplifies the currents flowing through the positive and negative power supply terminals of the first operational amplifier, and outputs these amplified signals. A boost circuit that performs push-pull synthesis and output, and a second operational amplifier whose positive and negative power supply terminals are commonly connected to the positive and negative power supply terminals of the first operational amplifier and which integrates the output signal of the boost circuit. It's because it's configured.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 4 is a circuit diagram showing the configuration of an embodiment of the amplifier according to the present invention. In this figure, an input terminal 17 to which a signal to be amplified is supplied is grounded via a resistor 18 and connected via a resistor 19 to a non-inverting input terminal of a first operational amplifier 14. The output terminal of the operational amplifier 14 is grounded via a resistor 20 and connected to an inverting input terminal of the operational amplifier 140 via a phase compensation capacitor 21, and the inverting input terminal is grounded via a resistor 22. There is. Positive power supply terminal 1 of this operational amplifier 14
．． 4a is connected to the emitter of an NPN transistor 23&, and the base of the transistor 23a is connected to the cathode of a Zener diode 24a whose anode is grounded, and is also grounded via a smoothing capacitor 25a, and connected to a resistor 26& It is connected to the positive power supply terminal 27a (voltage +V) via. Further, a resistor 2 is connected between the positive power supply terminal 27a and the collector of the transistor 23a.
8a and a diode 29aifi are sequentially connected in series. In this case, the portion consisting of the transistor 23a1 Zener diode 24&, the capacitor 25a1, the resistors 26a and 28a, and the diode 29a is the operational amplifier 1.
A Zener diode 24 is connected to the positive power supply terminal 14a of No. 4.
A constant voltage power supply circuit 30& that supplies a constant positive voltage determined by the Zener voltage of a is configured, and a current approximately equal to the current flowing to the positive power supply combination terminal 14a flows through the resistor 28a.
? It is designed to flow through. On the other hand, the negative power supply terminal 14b of the operational amplifier 14 and the negative power supply terminal 2713 (
N, pressure -■) is connected to the constant TitlE power supply circuit 3.
A constant voltage power supply circuit 30b configured similarly to 0a is provided, and a constant negative voltage determined by the Zener voltage of the Zener diode 24b is supplied to the negative power supply terminal 14b by kneading. 14
A 'rlT current approximately equal to the current flowing through resistor 28b flows through resistor 28b.

Further, the cathode of the diode 29a is connected to the base of a PNP transistor 31a, and this transistor 3
The emitter of 1& is connected to the positive power supply terminal 2 via resistor 32&.
7 & 0 these transistors connected to 311L%
The resistor 32& and the resistor 28as diode 29a constitute a current mirror circuit, and the transistor 3
The collector current of 1 & is approximately equal to the current flowing through the resistor 28a. Furthermore, the NPN transistor 31b and the resistor 32'o provided on the negative power supply side are constructed similarly to the above circuit, and the transistor 31
The collector current of resistor 28b is approximately equal to the current flowing through resistor 28b.

The collector of the transistor 31a is connected to the base of a drive transistor (NPN transistor) 34b in the boost circuit 33. The collector of the drive transistor 34& is connected to the positive power supply terminal 27a, and the collector of the drive transistor 34& is connected to the positive power supply terminal 27a.
The emitter of is connected to the base of an output transistor (NPN transistor) 35a, and is also connected to the output terminal 37 via a resistor 36IL. The collector of the output transistor 35a is connected to the positive power supply terminal 27a, and the emitter of the output transistor 35& is connected to the output terminal 37 via a resistor 38a. Further, the negative power supply side circuit in this boost circuit 33 is configured similarly to the above circuit, and each corresponding part has a suffix bp.
It is shown with the attached. Note that the drive transistor 34a
, 34b, a bias diode 3 is connected between both bases of 34b.
9 to 42 are connected in series.

On the other hand, the output terminal 37 is connected to the inverting input terminal of the first operational amplifier 14 via a parallel connection circuit of a feedback resistor 43 and a phase compensation capacitor 44, and is also connected to the inverting input terminal of the first operational amplifier 14 via a resistor 45 (value R). and is connected to the inverting input terminal of the second operational amplifier 15. This operational amplifier 15 is housed in the same package as the operational amplifier 14,
A capacitor 47 is connected between the inverting input terminal and the output terminal.
(value C) is inserted, its output terminal is grounded via a resistor 48, and the non-inverting input terminal of the arithmetic multiplier +DM'axs is grounded. Further, the positive power supply terminal tSa and the negative power supply terminal 15b of the operational amplifier 15 are commonly connected to the positive power supply terminal 14a and the negative power supply terminal 14b of the operational amplifier 1, respectively. The operation of this embodiment in the configuration will be explained.

First, to explain the normal amplification operation, input terminal 1
If the human power signal @1 is completely supplied to the input signal e1, a current io proportional to the input signal e1 will flow through the resistor 20. In this case, the positive power supply terminal 14 of the operational amplifier 14
The current flowing through a is passed through the aX negative power supply terminal 14b.
], then these currents i as i b
1&-11)=1°, and currents approximately equal to these currents i, , ib flow through the resistors 28a- and 28b, respectively. Therefore, the respective collector currents of the transistors 31as31b are also approximately equal to these currents 1IIL%ib, and this connection, these transistors 31a.

Each collector voltage of 31b changes in the same phase as the input signal e□. As a result of each of the drive transistors 34as34b being driven by the collector pressure, an output signal e0 having the same phase as the input signal e□ is obtained at the output terminal 37. In this case, a portion of the output signal e0 is negatively fed back to the inverting input terminal of the operational amplifier 14 via the feedback resistor 43 and the phase compensation capacitor 44.

Next, the DC servo operation in this embodiment will be explained. Now, suppose that the DC signal level of the output signal 8° has drifted to the positive side for some reason.

In this case, the second operational amplifier 15 outputs the output signal θ.

is integrated with a time constant of C-R, so the output voltage of the operational amplifier 15 transitions to the negative side.

As a result, the current of the negative power supply terminal 15b increases, the current of the resistor 28b and the collector current of the transistor 31'b also increase by that amount, and the collector voltage of the transistor 31b shifts to the negative side, thereby causing the output signal The DC signal level of e0 is returned to zero. Moreover, the output signal e. If the DC signal level of triad goes to the negative side, the calculation 1
By increasing the current at the positive power supply terminal 15a of the 1tO device 15, the DC signal level is returned to zero. Note that since the time constant C-R is set to a sufficiently large value with respect to the frequency of the amplified signal handled by this amplifier, the amplified signal will not be distorted by the DC servo operation.

Thus, according to this embodiment, although elements housed in one package are used as the first and second operational amplifiers 14 and 15, they can be constructed at extremely low cost.
Further, in this case, since both operational amplifiers 14 and 15 are thermally coupled, DC stability is extremely high even with respect to temperature changes.

In the above description, the operational amplifiers 14 and 15 are made of satin, which is housed in one package. However, it is of course possible to construct each of these operational amplifiers 14 and 15 by a single element. I don't mind.

As is clear from the above description, the amplifier according to the present invention includes a first operational amplifier whose input terminal is supplied with a signal to be amplified, and a +11? i! A boost circuit amplifies the currents flowing through the positive and negative power supply terminals of the device, push-pull combines these amplified signals, and outputs the resultant signals, and the positive and negative power supply terminals are connected to the first operation amplifier IIl! i! Commonly connected to the positive and negative power supply terminals of the device! Since it is configured by providing a second operational amplifier that integrates the output of the boost circuit, it is possible to use elements housed in one package as the first and second operational amplifiers, As a result, an amplifier with high output, high slew rate, and high DC stability can be realized at low cost with a simple Vζ configuration.

[Brief explanation of drawings]

Figures 1 and 2 are circuit diagrams showing examples of the configuration of a conventional amplifier, and Figure 3 is 1f! Fig. 4 is a circuit diagram showing the configuration of an embodiment of the present invention.
FF3 unit for calculation, 14a...positive power supply terminal,
14b...Negative power supply terminal, 15...Second
Operational amplifier, 15a...Positive power supply terminal, 15
b... Negative power supply terminal, 17... Input terminal, 33... Boost circuit, 37... Output terminal, 45... Resistor, 47... ...Capacitor.

Claims (1)

[Claims] A first operational amplifier whose input terminal is supplied with a signal to be amplified, and a boost which amplifies the currents flowing through the positive and negative power supply terminals of the first operational amplifier, and outputs the result of push-pull synthesis of these amplified signals. and a second operational amplifier whose positive and negative power supply terminals are commonly connected to the positive and negative power supply terminals of the first operational amplifier and which integrates the output signal of the boost circuit.