JPS599447Y2 - B class amplifier circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a class B amplifier circuit, and more particularly to a class B amplifier circuit improved to reduce power loss and facilitate integration into an integrated circuit.

Generally speaking, in a class B power amplifier circuit, for example, a class B audio output circuit, the theoretical efficiency (output voltage/input voltage) is π/4-# at the maximum output in the case of a sine wave output.
It is 0.78.

The remaining approximately 22% is power loss in the class B output stage.

Further, the maximum power loss Pcmax in the class B output stage occurs when the output voltage amplitude is π/2 of the maximum output voltage amplitude, and if the maximum output power is Pomax, then PCmax is 0.
4 Become Pomax.

However, Pcmax shown by this calculation formula is an ideal value, and in reality, the efficiency tends to deteriorate due to the transistor saturation voltage in the class B output stage.

That is, for example, if the maximum output power Pomax is LOW, PCmax will be at least 4W, and if a class B output stage is to be integrated into an integrated circuit, the maximum rating of the maximum power loss Pcmax will be 4W.

In other words, in order to increase the output power to 10 W or more, an integrated circuit with a maximum rating of the maximum power loss Pcmax of 4 W or more is required, and there are significant technical constraints on the integration of the circuit.

The present invention was developed in view of the above circumstances, and involves inserting a voltage control transistor in series in the path between the output transistor and the power supply or reference potential, and driving the base of this transistor with the amplified output voltage to drive the output transistor. By changing the power supply voltage to the output transistor, power loss of the output transistor can be reduced, and a class B amplifier circuit suitable for integration into an integrated circuit is provided.

An embodiment of the present invention will be described in detail below with reference to the drawings.

The present invention is based on the SEPP OTL method B as shown in Figure 1.
Output transistor Q1 and power supply terminal 1 in class amplifier circuit
This is characterized in that a power supply voltage control circuit 11 is inserted between the power supply voltage control circuit 11 and

That is, ■ is an input terminal, Qo is a drive transistor, Ql,
Q2 is a complementary-connected output transistor, P is an output terminal, C is an output capacitor, and RL is a load.

In the control circuit 11, the collector of, for example, an NPN type transistor 12 for voltage control is connected to a power supply terminal 10.
The emitter is connected to the collector of the output transistor Q1, that is, the energizing voltage supply terminal, and the base is connected to the output terminal P via a capacitor 13 and to the power supply terminal 10 via a resistor 14. with resistance 1
It is grounded via 5.

In the class B amplifier circuit having the above structure, the transistor 12
The divided voltage of resistors 14 and 15 is applied as a class A bias, and the power supply voltage is supplied to the output transistor Q1 through this transistor 12.

Therefore, if the amplified output voltage ■ of the output terminal P is a sine wave as shown by the solid line in FIG.
3 to the base of the transistor 12, and in response to this voltage, an in-phase output voltage Vp (shown by a dotted line in FIG. 2) appears at the emitter of the transistor 12.

In this case, Eo in the figure is the DC voltage at the output terminal P, and the rotation constant is determined so that the output voltage Vp (dotted line) of the transistor 12 is larger than the amplified output voltage (solid line) by the saturation voltage of the output transistor Q1. It is being

In other words, as can be seen from Figure 2, the voltage difference between the collector and emitter of the output transistor Q1 is always constant and can be set to a small value, so the power loss in the output transistor Q1 can be reduced compared to that of a conventional class B amplifier. This is sufficiently smaller than the loss in the output stage of the circuit.

In this way, the collector loss of the output transistors Q1 and Q2 can be reduced to about half the value of the collector loss in the output stage of a conventional class B amplifier circuit.

That is, conventionally, the maximum power loss Pcmax = 0. 4 P
cmax, but the maximum power loss Pc'max in the circuit of Fig. 2 is Pc'max -F 0 ,2Pom
It can be ax.

Note that the present invention is not limited to the above embodiment, but
Modifications can be made as shown in FIGS.

That is, in FIG. 3, a power supply voltage control circuit 21 is inserted between the output transistor Q1 and the reference potential (ground potential).

This control circuit 21 has a similar structure to the control circuit 11, but differs in that a PNP transistor 22 is inserted between the collector of the output transistor Q2 and the ground potential.

In such a class B amplifier circuit, the emitter voltage 2' of the transistor 22 is lower by a small constant value, as shown by the dotted line in FIG. 4, than the amplified output voltage 2, shown by the solid line in FIG. Effects similar to those described above in the circuit of FIG. 1 can be obtained.

FIG. 5 shows a class B amplifier circuit that uses the control circuit 11.21, and the emitter voltages vp, v of the transistors 12.22 and 22.22 are adjusted according to changes in the amplified output voltage V (solid line in FIG. 6). , ' are respectively changed as shown by the dotted lines in FIG. 6, the output transistors Q1,
This is designed to reduce power loss in Q2.

Although each of the above embodiments shows an example in which the present invention is applied to a SEPP OTL circuit, the present invention can be applied to other class B amplifier circuits as appropriate.

As described above, according to the class B amplifier circuit of the present invention, the collector loss of the output transistor can be reduced by driving the power supply voltage control transistor according to the amplified output voltage and changing the amplifier circuit power supply voltage. has advantages.

Therefore, when converting a class B amplifier circuit into an integrated circuit, if the maximum power loss of the desired output power exceeds the maximum rated power loss of the integrated circuit, or if the maximum collector loss power of the output transistor is less than the maximum power loss of the desired output power. By applying the present invention to this, there is an advantage that the desired desired output power can be obtained.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the class B amplifier circuit according to the present invention, Fig. 2 is a waveform diagram shown to explain the operation of Fig. 1, and Figs. 4 and 6 are waveform diagrams shown to explain the operations of FIGS. 3 and 5, respectively. Q1, Q2... Output transistor, 10...
...Power terminal, 11.21...Power voltage control circuit, 12.22...Voltage control transistor.

Claims (1)

[Scope of utility model registration request] an amplifier circuit having a first transistor and a second transistor that conduct in a complementary manner depending on the polarity of an input signal; a load of the amplifier circuit; and supplying an energizing voltage to the first and second transistors. a power supply voltage supply terminal for supplying a power supply voltage to the power supply voltage supply terminal; 1. A class B amplifier circuit, comprising at least impedance control means for controlling the impedance according to the input signal and controlling the voltage of the energizing voltage control terminal according to the input signal.