JPS5990931A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To clearly specify the end of etching in each stage and keep the characteristic without etching of the silicon substrate working as the base material. CONSTITUTION:The P-N junction surface of base 2 and emitter 3 is left in such a way as being covered with a silicon oxide film 4, and a polycrystal silicon film or that including oxygen 5 is formed on the entire part by the vapor growth method. The base electrode part of polycrstalline silicon film 5, P-N junction part of base and emitter and the emitter region are etched. For the etching, the KOH aqueous solution or CF4-O2 plasma is used, but since a selection ratio for the etching of silicon oxide film and polycrystalline silicon is large, the silicon oxide film 4 protects the silicon substrate during the etching of the polycrystalline silicon film 5.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a semiconductor device having a surface inactive layer.

(Constitution of Conventional Example and its Problems) In a planar semiconductor device, the surface of a silicon semiconductor substrate where a PN junction appears is usually impregnated with a silicon oxide film. However, due to the positive charge existing in the silicon oxide film, the electron concentration increases by that amount on the silicon substrate side. If the depletion layer spreads smaller than inside the substrate, a strong electric field concentrates at the interface, causing a decrease in the breakdown voltage near the interface, resulting in a decrease in the breakdown voltage of the PN junction element, and thus in reliability. It is also susceptible to the influence of external electric fields. Therefore, a polycrystalline silicon film or a polycrystalline silicon film containing oxygen is deposited instead of the silicon oxide film, thereby improving the breakdown voltage of the junction and improving reliability.

However, since the etching behavior of polycrystalline silicon films or polycrystalline silicon films containing oxygen is similar to that of the single-crystal silicon film of the base substrate, the opening of the electrode portion is formed in a film such as polycrystalline silicon deposited in contact with the silicon substrate. When forming the silicon substrate 1, the silicon substrate 1 was also etched, which caused deterioration of the PN junction characteristics or the characteristics of the pN junction element. Polycrystalline silicon films and polycrystalline silicon films containing oxygen can be wet etched using a mixed solution of HF/HNO3 or an aqueous solution of KOH, and dry etched using C
Can be etched in F4-O2 plasma. However, with either method, the silicon substrate is also etched in the same way as in most cases, so when etching a film such as polycrystalline silicon on a silicon substrate, a protective film is required for monocrystalline silicon. The manufacturing process is also quite complex.

(Purpose of the Invention) The present invention has been made to solve the above-mentioned difficulties, and it is possible to form an opening for an electrode part in a film such as polycrystalline silicon without etching the underlying silicon substrate.
The object of the present invention is to provide a method for manufacturing a semiconductor that does not cause deterioration of characteristics.

(Structure of the Invention) The present invention includes a step of forming a silicon oxide film by covering three areas on the surface of a substrate including a bonding part, and selectively leaving the silicon oxide film on one area and covering the other area. manufacturing a semiconductor device comprising a step of removing the silicon oxide film, a step of forming polycrystalline silicon over the entire area including the remaining silicon oxide film, and a step of forming a selective opening in the overlapped portion of the polycrystalline silicon and the silicon oxide film. According to this method, selective openings are formed in polycrystalline silicon in a first step, and then,
In the second step, selective openings are formed in the silicon oxide film, and the end point of etching becomes clear at each stage of forming selective openings, preventing excessive etching of the underlying silicon substrate and deterioration of characteristics. can be prevented.

The present invention will be described in detail below using the drawings.

(Description of Embodiments) FIGS. 1 to 6 show an example of implementing the present invention in the manufacturing process of an NPN planar transistor in the order of steps.

In FIG. 1, a silicon oxide film is formed on the surface of an N-type semiconductor substrate 1 by thermal oxidation, an opening is formed in the silicon oxide film, and impurities are diffused through this opening, thereby converting the base region 2 into a P-type semiconductor substrate. Formed by impurity diffusion, then
The emitter region 3 is formed by diffusing N-type impurities using the oxide film formed during this diffusion as a mask. A thermal oxide film 4 is formed during this diffusion.

FIG. 2 shows a base region 2 and a flutter region 1 on the semiconductor surface where the depletion layer reaches when a reverse bias voltage is applied to the collector-base junction and the collector-base junction.
The upper silicon oxide film 4 is removed and an opening is formed at the same location. By leaving the silicon oxide film 4 to cover the PN junction surface between the base 2 and emitter 3, it is possible to prevent hFE from decreasing due to leakage current when the PN junction is 1-biased.

In FIG. 3, a polycrystalline silicon film 5 containing deoxidized polycrystalline silicon or oxygen is formed over the entire surface by vapor phase growth. The semiconductor surface where the depletion layer reaches when a reverse bias is applied to the collector-base junction and the collector-base junction is directly deoxidized with polycrystalline silicon or a polycrystalline silicon film 5 containing oxygen is ruptured. By this, the electrical state of the PN junction is determined, and the withstand voltage and reliability are improved.

Figure 4 shows the etching of the base electrode part, the PN junction between the base and emitter, and the emitter region of a polycrystalline silicon film or polycrystalline silicon M5 containing oxygen to form openings for the base and emitter electrode parts. This is what I did. In this case, when etching the polycrystalline silicon film or polycrystalline silicon M5 containing oxygen in an area about 10/1 m narrower than the area of the silicon oxide film 4, the area to be etched depends on the precision of mask alignment.
The polycrystalline silicon film or the oxygen-containing polycrystalline silicon film 5 moves from the region and etches the region where the polycrystalline silicon film 5 containing oxygen is directly adhered to the silicon substrate, further etching the silicon substrate and deteriorating the forward characteristics. Therefore, it is advisable to be careful to prevent this from happening. For etching the polycrystalline silicon film or polycrystalline silicon film 5 containing oxygen, a KoH aqueous solution or CF,
-Q2 plasma is used, but the etching selectivity of silicon oxide film and polycrystalline silicon or polycrystalline silicon film containing oxygen is large l/-1 ftc, so silicon oxide film 4
plays a role of protecting the silicon substrate when etching the polycrystalline silicon film or the polycrystalline silicon film 5 containing oxygen.

FIG. 5 shows the formation of openings for the base and emitter electrode portions. At the end of the polycrystalline silicon film or the oxygen-containing polycrystalline silicon film 5, a region is formed where the silicon oxide film 4 is in contact with gravity.

In FIG. 6, a base electrode 6 and an emitter electrode 7 are formed.

Figure 7 shows silicon (81), polycrystalline silicon containing oxygen (5iQ1.33), and vapor phase deposition (CVD).
Indicates the etching rate when the silicon oxide film (Si02) formed by etching is etched by CF4-O2 plasma, HF/HNO3-based aqueous solution, and KOH aqueous solution, respectively, where a is for CF4-0 plasma and b is for HF. /) When using INO3 system, C is KOH5%
The characteristics when using an 80°C aqueous solution are shown. It's 1.* mark is 90
This is a sample that was heat-treated for 20 minutes in dry N2 at 0°C.

In this embodiment, the present invention was applied to an NPN transistor, but it is clear that the same effect can be obtained even if the present invention is applied to a PNP transistor or a diode.

(Effects of the Invention) As explained above, in a semiconductor device having a PN junction surface, the present invention selectively etches a silicon oxide film on a silicon substrate surface, and etches a region including an electrode portion connected to the selected region. A silicon oxide film is left, a semi-insulating film such as polycrystalline silicon or oxygen-containing polycrystalline silicon is bonded to the entire surface, and the semi-insulating film on the remaining silicon oxide film is bonded to at least the overlapping edge of both films. By removing the silicon substrate while leaving behind, etching of the silicon substrate is completely prevented, and therefore, there is an advantage that deterioration of characteristics due to such etching speed does not occur.

[Brief explanation of drawings]

FIGS. 1 to 6 are cross-sectional views showing an embodiment of the present invention in the order of steps, and FIG. 7 is SL 5iOo, :+3+ cvDs.
cp4-O2 plasma for Io2, HF/)INO
, a diagram showing the etching rate by a KOH aqueous solution and a KOH aqueous solution. ] ・・・・・・N-type semiconductor substrate, 2・・・・・・
...Base region with P-type impurity diffused, 3...
...Emitter region with N-type impurity diffused, 4.
・・・・・・Thermal oxide film, 5 ・・・・・・ Polycrystalline silicon film or polycrystalline silicon film containing oxygen, 6.
...Base electrode, 7...Emitter electrode. -1. Figure 1 4 Figure 2 Figure 5 Figure 6 Figure 7 (λ/mint = 14-

Claims (1)

[Claims] a step of forming a silicon oxide film by covering three regions of the substrate surface including the bonding portion; a step of selectively leaving the silicon oxide film on one region and removing the other region; and a step of removing the remaining silicon oxide film. A method for manufacturing a semiconductor device, comprising the steps of forming polycrystalline silicon over the entire area including the top of the film, and forming a selective opening in an overlapping portion of the polycrystalline silicon and silicon oxide film.