JPS5980940A - Manufacture of insulator isolated substrate - Google Patents

Abstract

PURPOSE:To maintain the strength of a semiconductor substrate sufficiently by positively coating the outer circumferential section of the substrate with a mask material and preventing the formation of a groove in the outer circumferential section of the substrate. CONSTITUTION:Opening sections 13 are formed to the masking material 12 in an inter-element isolation region by etching the substrate into a desired pattern. It is required to leave the masking material 12 in the outermost circumferential section of the substrate 11, accordingly, chip arrangement is designed such that the inter-element isolation region wherein chips b1, b2, b3... are already arranged does not come in contact with the outer circumferential section of the substrate 11. V-shaped grooves 14 are formed to correspond to the opening sections 13 through anisotropic etching by KOH, etc. while using the residual masking material 12 as a mask, the masking material 12 is removed, an inter-element isolating film 15 is formed, and a polycrystalline silicon layer 16 is grown on the film 15 as a substrate layer. The substrate is removed thrugh polishing, etc. from the back side until the bottoms of the V-shaped grooves 14 are exposed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing an insulator separation substrate.

A conventional method for manufacturing an insulator separation substrate will be described with reference to FIG. In FIG. 1, reference numeral 1 denotes a semiconductor substrate, and first, a mask material 2 is formed on the surface of this semiconductor substrate l. Next, as shown in FIG.
form. Thereafter, the semiconductor substrate 1 is etched using KOI (etching method) using the remaining mask material 2 as a mask. Thereby, a V-shaped groove 4 is formed in the semiconductor substrate 1 as shown in FIG. 1(C).Next, After removing the mask material 2, an element isolation film 5 is formed on the surface of the semiconductor substrate 1 including the V-groove 4 as shown in FIG. Thereafter, the semiconductor substrate 1 is removed by polishing or the like from the back side until the bottom of the V-shaped groove 4 is exposed, and thus an insulator separation substrate as shown in FIG. Manufactured.

By the way, FIG. 2 shows a chip &@ r on a semiconductor substrate l.
&2 a a3... shows a state in which they are arranged. As shown in this figure, chips are placed on the entire surface of the semiconductor substrate 1. It is formed vertically. There are a large number of isolation regions within each chip formed in this way, but conventionally, since chips are arranged up to the outer periphery of the semiconductor substrate 1, the outer periphery of the semiconductor substrate 1 is An element isolation region may be located in some areas.

Therefore, conventionally, an opening 3' is formed in the mask material 2 in the process shown in FIG. The formation of this groove 4' has the following drawbacks.

■ Generally speaking, the depth of the groove 4' is as much as 10-100 μm, so if we take a 3〃φ semiconductor substrate l as an example, in some cases, the only thick region of the entire semiconductor substrate l is the semiconductor substrate. The reason is that it is formed on the outer periphery of the substrate l. The outer periphery of the semiconductor substrate l is particularly susceptible to external force.

Therefore, chips and cracks may occur in the semiconductor substrate 1 in subsequent steps.

(2) When the polycrystalline silicon layer 6 is grown in the process shown in FIG. 1(2), a region 7 with uneven height is generated at the outer periphery. Therefore, there are inconveniences such as chipping or cracking of the substrate, as well as difficulty in applying wax when attaching the substrate during the polishing process.

(2) Furthermore, even in the final finishing state, a sagging area 8 occurs on the outer periphery of the substrate, causing chipping and cracking of the substrate.

The present invention has been made in view of the above points, and it is an object of the present invention to provide a method for manufacturing an insulator-separated substrate that can solve all of the conventional drawbacks.

An embodiment of the present invention will be described below with reference to FIG.

In FIG. 3, 11 is a semiconductor substrate. First, the surface of this semiconductor substrate 11 is coated with Sin, or Si HN4.
A mask material 12 made of, for example, is formed.

Next, the mask material 12 is etched into a desired pattern using a seven-layer technique, and the mask material 12 is etched with openings 13 in the device isolation regions, as shown in FIG.
form. At this time, the difference from the conventional method is that in the invention of , the mask material 12 is always left on the outermost periphery of the semiconductor substrate 11 . Such a structure can be easily obtained as follows.

That is, in FIG. 4, chips b, .
b21 b, . . . are arranged, and as is clear from a comparison with FIG. In addition, the chip arrangement should be such that the element isolation pattern does not come into contact with the outer periphery of the semiconductor substrate 11. The easiest way to achieve this is to use an element isolation mask for chips that are located at locations where it is known in advance that 100% of the chip pattern cannot be transferred to the semiconductor substrate 11 and cannot be used as a final product. It should not be included in Another method is to use an element isolation mask with a chip arrangement having an outer diameter smaller than the outer diameter of the semiconductor substrate 11 by, for example, about 1+nm, and to be careful when aligning.

Once the opening 13 is formed as described above, next
By anisotropically etching the semiconductor substrate 11 using KOH using the remaining mask material 12 as a mask, a V-shaped groove 14 is formed in the semiconductor substrate 11 corresponding to the opening 13 in FIG. 3 (0). The semiconductor substrate 11 is formed as shown in the figure.At this time, the outer peripheral portion of the semiconductor substrate 11 is not etched and remains in its original state.

Next, after removing the mask material 12, an inter-element isolation film 15 is formed on the surface of the semiconductor substrate 11 including the V-shaped groove 14 as shown in FIG. A polycrystalline silicon layer 16 is grown.

Thereafter, the semiconductor substrate 11 is removed by polishing or the like from the back side until the bottom of the V-shaped groove 14 is exposed, thereby producing an insulator isolation substrate as shown in FIG. 3(G).

In the above embodiment, by carefully arranging the chips and tabs on the mask, the mask material 12 is always left on the outermost periphery of the semiconductor substrate 11, so that grooves are not formed on the outer periphery of the semiconductor substrate 11. However, after forming a region without masking material on the outer periphery of the semiconductor substrate 11 using a conventional mask,
For example, the semiconductor substrate 11 is coated with a resist material, etc.
A groove may not be formed on the outer periphery of the semiconductor substrate 11 by covering the outer periphery of the semiconductor substrate 11 with a new mask material.

As is clear from the above description, in the method for manufacturing an insulator separation substrate of the invention, by always covering the outer periphery of the semiconductor substrate with the mask material, no groove is formed on the outer periphery of the semiconductor substrate. Do it like this.

Therefore, the strength of the semiconductor substrate, the strength of the substrate when the polycrystalline silicon layer is grown, and the strength of the substrate in the finished state are sufficiently maintained, and the occurrence of chips and cracks is reduced compared to the conventional method. significantly reduced. Furthermore, if the groove is eliminated from the outer periphery of the semiconductor substrate, the height of the outer periphery of the substrate will be kept uniform when the polycrystalline silicon layer is grown.
The work of attaching the substrate in the subsequent polishing process is stable. Due to these effects, an insulator-separated substrate can be obtained at low cost. □If the chip arrangement on the element isolation mask is such that mask material is left on the outer periphery of the semiconductor substrate, the number of chips to be arranged on the mask must be adjusted when manufacturing the element isolation mask. Since the amount can be reduced, there is an advantage that the mask can be manufactured at low cost.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a conventional method for manufacturing an insulator separation substrate, FIG. 3 is a sectional view showing an embodiment of the method for manufacturing an insulator separation substrate of the present invention, and FIGS. 2 and 4 are for semiconductors. FIG. 3 is a plan view showing a state in which chips are arranged on a substrate. 11... Semiconductor substrate, 12... Mask material, 13...
- Opening, 14...7-shaped groove, 15... Interelement isolation film, 16... Polycrystalline silicon layer. Patent applicant Oki Electric Industry Co., Ltd. Figure 1 1 1 Figure 2 Figure 3 I2 Figure 4

Claims (1)

[Claims] By forming a mask material on the surface of a semiconductor substrate, forming an opening in a predetermined region of the mask material, and etching the semiconductor substrate using the remaining mask material as a mask, the semiconductor substrate corresponding to the opening can be etched. forming a groove at the bottom of the groove; after removing the mask material, forming an inter-element isolation film on the surface of the semiconductor substrate including the groove, and further forming a support layer thereon; In the method for manufacturing an insulator separation substrate, which includes the step of removing the semiconductor substrate from the back side until the semiconductor substrate is exposed, grooves are not formed on the outer periphery of the substrate by always covering the outer periphery of the semiconductor substrate with a mask material. A method for manufacturing an insulator separation substrate, characterized in that: