JPS5980064A - Detector of vertical synchronizing signal - Google Patents

Abstract

PURPOSE:To simplify a circuit constitution, by detecting a vertical synchronizing signal with combination of a monostable multivibrator and an FF and at the same time to detect stably the vertical synchronizing signal by limiting the output pulse width of the monostable multivibrator within a fixed range. CONSTITUTION:A synchronizing signal is separated from a TV signal by a synchronism separating circuit 4 of a vertical synchronizing signal detector. Then a composite synchronizing signal A is applied to a monostable multivibrator 5 and triggered at the front edge of a negative pulse. With this triggering an output pulse B having pulse width TM is delivered from the vibrator 5. At the same time, a signal A separated by the circuit 4 is applied to a data input terminal D of a D type FF6, and the pulse B delivered from the vibrator 5 is applied to a clock input terminal C of the FF6. Then TH<TM<TA is set for the width TM of the pulse B to the pulse width TH of a horizontal synchronizing pulse PH and the mutual distance TA of an equivalent pulse PI. Then a stable vertical synchronizing signal C is detected with combination of the vibrator 5 and the FF6.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an apparatus for detecting a vertical synchronization signal from a composite synchronization signal separated from a television signal or composite video signal.

As shown in Fig. 1, the conventional vertical synchronization signal detection circuit has an integration circuit tl+ that integrates the composite synchronization signal, and an output voltage of this integration circuit (1) and a reference voltage provided from a reference voltage source (2). It consists of a comparator (3) that compares the A combined synchronization signal including a horizontal synchronization pulse, an equivalent pulse, and a vertical synchronization pulse is input to the integrating circuit [11], and since the pulse width of the vertical synchronization pulse is larger than other pulses, it is Figure 2 (The integrated output voltage of Al is generated, and based on the comparison between this and the reference voltage, Figure 2 Q31v
The waveform shaped output shown in c is obtained. However, although this vertical synchronization signal detection circuit has the advantage of being simple in configuration, the integral waveform may be affected by foreign noise.
Depending on the selection of the integration time constant, the integration waveform is affected, and the front and trailing edges of the vertical synchronization signal shown in Figure 2 (31) become unstable, and the reference voltage (2) changes in temperature. This method has a disadvantage in that when the reference voltage changes due to factors such as the above, the front and trailing edges of the vertical synchronizing signal change. An example of a method to solve this drawback of glaze is the Tokuko Sho 57-289.
As disclosed in Japanese Patent No. 99, it is possible to accurately detect the start point of a vertical synchronizing pulse section using a logic circuit, but the circuit configuration becomes complicated.

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide a VC device capable of safely and easily detecting a vertical synchronization signal with a simple 8-cycle configuration.

To achieve the above object, the present invention provides pulses that are triggered by the MJR of the trough pulses of a composite synchronization signal separated from a television signal and are wider than the pulse width of the horizontal synchronization pulses but narrower than the mutual spacing of one equivalent pulse. a monostable multivibrator that generates pulses with a width of a flip-flop for delivering an output indicating whether the coupled synchronizing signal applied to the data input terminal is at a high level or a low level at the time of a trailing edge of an output pulse of the monostable multivibrator; , relates to a vertical synchronization signal detection device configured to obtain a vertical synchronization signal from the flip-flop.

According to the present invention, the vertical synchronization signal can be detected using only a monostable multivibrator and a flip-flop, so the circuit configuration can be greatly simplified. IT: As long as the variation in the output pulse width of the monostable multivibrator is within a one-foot range, it does not affect the variation in the detection point of the vertical synchronization signal, so the vertical synchronization signal can be stably detected.

Next, a vertical synchronization signal detection device according to an embodiment of the present invention will be described with reference to FIGS. 83 and 4.

(4) is a synchronization separation circuit, which separates the synchronization signal from the television signal (composite video signal).
This is a known circuit that outputs a matched synchronization signal shown in FIG.

(5) is a monostable multivibrator, and! Figure 4 (A
It is triggered by the leading edge (falling edge) of the negative (low level) pulse of the horizontal synchronization pulse shown in "f? is a circuit that generates an output pulse width PM of a narrow pulse @TM.It is advisable to set the pulse width TM to 1/4H to 3/8H.

(6) is a D-type flip-flop, and the synchronous separation circuit IM
(data input terminal CD connected to J) and a clock input terminal (C) coupled to the output terminal of the monostable multivibrator (5), the clock input terminal (C) l
The composite synchronization signal supplied to the data input terminal (D) at the trailing edge (rising edge) of the most recent output pulse PM of the monostable multivibrator (5) supplied to C18 is at a high level or at a low level. sends output indicating the

Next, refer to Figure 4 and explain the operation of the circuit in Figure 3.9! , will give a good explanation. FIG. 4 (In the composite synchronization signal shown in Al, the period after time 12 is the vertical blanking period r), of which t, ~t are the equivalent pulse period T1, and t, ~t
0 is a vertical synchronizing pulse section T2, t, to tll are equivalent pulse sections Ti, and the others are horizontal synchronizing pulse sections. The pulse width T of the horizontal synchronization pulse PH is 0.04H, and the pulse width T of the vertical synchronization pulse Pv is 0.04H.
The mutual spacing TA of V and equivalent pulse P is 0.46H. Therefore, the width TM'Y of the monostable multivibrator (5) of the fourth tooth (4th tooth) is the width of the output bar (PM).

If you set TH<TM<TA (or TV), you can get the vertical synchronization signal detection output of D-type flip-flop (61 (7) output terminal Qvc (0). At the point in time, the monostable multivibrator (5) is triggered and the pulse width TM from t1 to t2
When the output of 1 is generated, the input terminal (D) of the 7 lip-flop (6) reads the high level of the composite synchronization signal shown in FIG. 4 at the clock time 11. As a result, the output of the flip-flop (6) of FIG. 4 fcl is maintained at a high level.

Next vcts~1. Then again use the monostable multivibrator (5
) generates an output pulse, and at time 14, a composite synchronization signal is input to the 7 lip flop (6). Even at this time, since the input is at a high level, the Q output of the flip 70 tube (6) is held at a high level. After that, a vertical synchronizing pulse with a pulse width TV is generated at the time point 13, and a pulse is generated from the monostable multivibrator (5) at the leading edge of this pulse.
When time point 6 becomes the trailing edge, a vertical synchronizing pulse Pv is applied to the input terminal of the flip-flop (6) using this trailing edge as a clock.
The low level of Q is input, and the Q output is inverted to low level.

At the trough clock of the vertical synchronization pulse interval T, the input terminal (DJ of the flip-flop 6) (since DJ is at a very low level, the Q output 21) is kept at a low level until time tI0. At time t+o, the equivalent pulse section T is reached, so the input terminal CD of flip-flop +67 becomes high level, and the Q output of flip-flop +67 also becomes high level. In addition, in the horizontal synchronization pulse section, monostable multivibrator (54
Since the input of the 7 lip-flop + 6J is at a high level at the trailing edge of the output pulse of the Q output, the Q output is kept at a high level.

As is clear from the above, according to this embodiment, a monostable multivibrator (5j) and a DiM flip 7°70g (6
), it is possible to detect the vertical synchronization signal only in combination with vc. Therefore, one circuit configuration can be greatly simplified.

In addition, even if the output pulse width of the monostable multivibrator (5) varies within the range that satisfies the conditions TM, di, TH < TM < TA, the detected integral π does not directly affect vc, so the vertical synchronization signal is stabilized. It is possible to check the actual situation.

Although one embodiment of the present invention has been described above, the invention is not limited to this and can be further modified. For example, the synchronization separation circuit (4) may output a positive pulse composite synchronization signal. The output pulse of the IL monostable multivibrator (5) may be a positive pulse.

[Brief explanation of the drawing]

Fig. 2 is a block diagram showing a conventional vertical synchronization signal detection circuit; Fig. 2 is a waveform diagram showing the states of points A and B in Fig. 3;
The figure is a block diagram showing the vertical synchronizing signal detection device according to the embodiment shown in FIG. 4, and FIG. 4 is a waveform diagram showing the states of points 4 to 0 in FIG. In the symbols used in the drawings, (4) is a synchronous separation circuit, (5) is a monostable multivibrator, and (6J is a flip-flop).

Claims (1)

[Claims] ti+ A horizontal synchronization signal (wider than or equal to the pulse width of the pulses) (narrower than the mutual spacing of the pulses) triggered at the leading edge of each pulse of the composite synchronization signal separated from the television signal. a monostable multivibrator that generates pulse width) (pulse width); and a monostable multivibrator that generates pulse width). At the time of the trailing edge of the output pulse of the monostable marteno (inflator) supplied, the composite synchronization signal supplied to the data input terminal provides an output indicating whether the composite synchronization signal is at a high level or a low level. 7 1J flip-flop.In this way, the vertical synchronization signal detection device is configured to have a 51C configuration so that a vertical synchronization signal can be obtained from the flip-flop.