JPS5979548A - Separating method by dielectric - Google Patents

Abstract

PURPOSE:To obtain an insulating isolation layer simply by filling a groove formed through reactive ion etching with the dielectric through a bias sputtering method being executed while applying bias to a substrate. CONSTITUTION:An epitaxial layer 2, an SiO2 film 4 and an Si3N4 film 5 are superposed on the (100) face of the Si substrate 1 and windows are bored selectively, and the grooves 7 are formed through a reactive ion etching method through which side surfaces are hardly etched. The inner surfaces of the grooves are coated with SiO2 8, the film 5 is removed, and an Si3N4 film 9 is formed newly through a CVD method. SiO2 10 is deposited through sputtering while applying bias to the substrate 1. The deeper groove 7 is buried more quickly at that time, and the irregularity of the surface of SiO2 after filling is small. The whole upper surface is etched by plasma to remove the excessive material 10, the Si3N4 film 9 is exposed, and an Si3N4 film 11 is deposited, thus completing the isolation grooves.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a dielectric isolation method for electrically separating semiconductor regions from other semiconductor regions.

The dielectric material pt+ method is a method in which the periphery of the semiconductor region 1 is covered with a dielectric material 1'Jl, and is a method with excellent characteristics. A typical example is Aitsubu 1, which uses selective oxidation technology.
]・-su(1”? 'I'm complaining.

However, this isoplanar structure is said to have a limit in terms of increasing the degree of integration because a so-called bird's beak phenomenon occurs, in which the oxide film sinks into the element formation region due to selective oxidation.

Therefore, recently, new dielectric separation methods are being developed. The technology utilizes reactive ion etching with less re-etching.

The content is that 11.v is formed by reactive ion etching on the surface of the semiconductor substrate where the dielectric component pH (j) should be, and then the dielectric material is deposited on the surface of the semiconductor substrate. Depending on the above +r, l)
The inside of the semiconductor substrate is filled with a dielectric material such as polycrystalline silicon or silicon dioxide, and then the excess dielectric material on the semiconductor substrate is removed.

By the way, in this new dielectric separation method, since unevenness occurs on the surface of the dielectric material filling the groove, it is necessary to consider flattening the substrate surface when removing the excess dielectric material. However, there is a problem that the 2nd degree becomes the belly or 11th.

The present invention was made with the aim of solving such problems by 1 degree, and is characterized by the fact that, as a method of depositing the dielectric material, the semiconductor substrate is coated with a bar.
The main point is that bias spangling is performed while applying an electric current.

In this bias sputtering, compared to ordinary chemical vapor deposition (CVD) methods, deep grooves tend to be filled faster than shallow grooves due to the influence of the electric field caused by the bias, and as a result, as mentioned above, This provides the advantage that the surface irregularities of the dielectric material rl filling the grooves are reduced, and excess dielectric material can be removed relatively easily.

By describing the embodiment shown in one drawing above, the contents of the present invention will be made clearer. In addition, the examples describe the / between elements when manufacturing bipolar integrated circuits.
Although the 1) side is shown, the present invention is not limited thereto and can also be applied to a MOS type.

First, a buried layer 2 is provided on the surface of a silicon substrate 1- with a plane orientation of (100), and a Si epitaxial layer (thickness 1 to 2 It m) that will become the active part of the transistor is formed on the buried layer 2.
:, forming S. Then, Si epitaxial layer 3
After thermally oxidizing the surface of silicon dioxide IITA4 and forming a silicon nitride film 5 thereon by the CV I) method, the silicon nitride film 5-2 and silicon oxide film 4 are buttered by normal bottom etching. Then, a window is opened in the portion 6 where the dielectric material is to be separated (FIG. 1).

Next, using the silicon nitride film 5-2 and the silicon oxide film 4 after opening the window as a mask, a groove 7 penetrating through the buried layer 2 is formed.
form. The above-mentioned reactive ion etching is used to form this 11!7 (FIG. 2).

Following this, the silicon nitride film 5 on the surface is masked and 2 i! After forming a silicon nitride film 8 and removing the silicon nitride film 5, CV
Silicon nitride II;'j 9 is newly formed on the entire surface by method D. A dielectric material 10 is then deposited on the upper surface of the silicon substrate 1- (FIG. 3). Bias sputtering is used to deposit the dielectric materials 1-6. According to this, 1 silicon base is 1. 2. iF! The deeper part of '7 is buried relatively quickly, and the surface of the dielectric material ill L O becomes smooth at the part of 'r7f'7.The dielectric material tIi material 1o and C are polycrystalline silicon. Silicon dioxide or silicon dioxide can be used, but please consider the wiring capacitance after the device is completed.
, ), it is preferable to use silicon dioxide, etc., which has a smaller dielectric constant. In some cases, the surface of the dielectric material 1-0 may be coated with 5OG (spin-on glass) to make the surface smooth.

Next, the entire −L plane of the silicon substrate 1 is coated with silicon nitride;
, 'i 9 is exposed by plasma etching.

Then, by depositing silicon nitride 11, 'I7'? 7 parts of the dielectric IA material 1o are inserted to complete the division process (Figure 4). Thereafter, elements such as transistors are formed by a conventional method to complete a bar-r polar type integrated circuit.

As described above, in this invention, the dielectric sorting 7' Since it is lfE, it has the excellent effect of simplifying the process of a dielectric tone dividing IC using reactive ion etching.

[Brief explanation of drawings] Figures 1 to 4 show an embodiment of the present invention. This is a diagram.

Claims (1)

[Claims] , 1' conductor (on the surface of the adhesive board, a groove is formed by etching the dielectric material in the area where the dielectric is to be separated, -) and 1.C's 1', conductor. By depositing a dielectric material on the surface of the semiconductor substrate, the inside of the semiconductor substrate is filled with the dielectric material, and the semiconductor substrate is transferred.
-excess dielectric material 1"l y, dielectric material to be removed m1
[In the method, the dielectric material separation method is characterized in that bias sputtering is used as the method for depositing the dielectric material (') while applying a HA/R to the semiconductor substrate.