JPS5975350A - Memory controlling method in multi-processor system - Google Patents

Abstract

PURPOSE:To constitute so that each processor can utilize in common an assigned memory space, by writing a memory mapping table in an address converting device, by a master processor. CONSTITUTION:A master processor 3 inputs in advance a memory mapping table output S0 for assigning slave memory spaces M1, M2-Mn to a common memory space 4 of large memory size which the master processor 3 can control, to an address converting device 5. Subsequently, the memory spaces M1, M2- Mn are assigned to a prescribed position of the common memory space 4, as they are or dividing them. This common memory space 4 can be utilized by executing access by a data address signal SA and SB, respectively, by the master processor 3 and slave processors S1, S2-Sn.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a memory management method in a multiprocessor system.

BACKGROUND ART Conventionally, a bank switching method is known in which a memory space is expanded by providing a memory switching function for a plurality of memory spaces in one processor.

FIG. 1 shows a configuration diagram of an example of a conventional bank switching system.

In the bank switching method shown in FIG.
A memory switching device 2 is arranged between 8M, . The conventional system simply expands the memory space available to the processor.

In recent years, advances in VLSI technology have made it easy to obtain processors with extremely large memory spaces.If such processors with large memory spaces are combined with conventional processors with small memory spaces, large Intercommunication between a processor with a memory space and a processor with a small memory space has been disadvantageous because it is limited by the small memory space.

The present invention provides a memory management method for a multiprocessor system that enables mutual communication with an expanded memory space among multiprocessors with different sizes of memory space, without particularly changing the software C and hardware of the processor with a small memory space. The purpose is to provide

2. In the multiprocessor system that achieved the purpose of
The structure of the memory management method is that in a multiprocessor system consisting of a plurality of different types of processors with different maximum memory spaces, the master processor writes data into the large memory space of one of the processors with the above-mentioned number of processors. Based on a replaceable memory mapping table,
The present invention is characterized in that a memory space is freely allocated to each processor having a small memory space, and the processors share the allocated memory space.

A memory management method in a multiprocessor system according to the present invention will be explained with reference to the drawings.

FIG. 2 is a block diagram of one embodiment of a master-slave multiprocessor system using the memory management method of the present invention. In Fig. 2, 2 and 3 are master processors, S,
, S, ... * Sn is a slave processor, 4 is a shared memory space, 5 is an address conversion device, SA is a data address signal of 1 master processor, SB is a data address signal of a slave processor, SO is a data address signal output from master processor 3. and the slave memory is empty M) (Mt −Mz −
0.Mn) to the shared memory space 4.

In the master processor system shown in FIG.
--Input the memory mapping table output, SO, which allocates Mn to the shared memory space 4 with a large memory size that can be controlled by the master processor, and inputs the slave memory space M1. M2
. . . Mn is allocated as is or divided and allocated to a predetermined location in shared memory space 4. The master processor 3 and the slave processors S1, S2, . In addition, the slave processor can recognize that the slave memory apparently belongs to it without any difference, i.e.,
The master program 3 can be used based on the memory mapping table via the address translation device 5t without changing the access program in any way. Freely divide and allocate the slave memory space in the shared memory space 4,
With respect to the newly allocated shared memory space 4'c, the slave processor can use the memory mapping table in the same manner as when the slave memory space is assigned to itself.

FIG. 9 is a continuation of the mapping to the shared memory space between slave memory walls. 4 is a shared memory, 5 is an address translation device, rvii, 1 and 2. +1...to me ij /CV
-F) Mori, Ml 1 e Ml2 * M,,l
, M2R; “ ” is the slave memory space M
, , arrange the divided memory for the divided allocation of M2・C
The contents of these mappings are written in the memory mapping table, and are edited by the master processor t3, input to the address translation device 5, and recorded.Slave processors s, es, j''...Sn is the memory mapping table. Address translation device fIt5 based on
The slave memory can be used as if it belonged to itself through the . Since the mutual communication between the mask and slave is performed using the shared memory space 4, the communication has been greatly expanded. It is possible to communicate in the memory space for

According to the memory management method in a multiprocessor system according to the present invention, the master processor loads a memory mapping table into the address translation device, thereby providing a wide memory space in which the master processor can control the memory space of each processor in the multiprocessor system. Each processor can be created without changing the access program using the memory mapping table of the address translation device, that is, without being conscious of switching memory spaces. You can use the program that you have installed as is. By rewriting the contents of the housing memory mapping table by the master processor, the slave memory space is also switched.
Slave processors can now address the expanded memory 9.

In addition, mutual communication between master and slave slaves without any special changes to the software or hardware of a multiprocessor system is possible by using shared memory, making it easy to use and significantly expanding the memory space for communication. Ta.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional bank switching method, FIG. 2 is a block diagram of a master-slave multiprocessor system illustrating one embodiment of a memory management method in a multiprocessor system according to the present invention, and FIG. The figure is a schematic diagram illustrating the mapping of the slave memory space to the shared memory space shown in FIG. 2. In the figure, 2 is a processor, 2 is a memory switching device, 3 is a master processor, 4 is a shared memory space, 5 is an address translation device, Sl*S2...Sn is a slave processor, M□2M
2. ... is the slave memory space. Patent Applicant: Sumitomo Electric Industries, Ltd. Representative: Patent Attorney: Shibu Mitsuishi (and 1 other person) Figure 1 Figure 3

Claims (1)

[Claims] In a multiprocessor system consisting of multiple processors of different types with different maximum memory spaces, a memory mapping table that can be rewritten by the master processor is stored in the large memory space of the master processor, which is one of the multiple processors. Next, a memory management method in a multiprocessor system, characterized in that a memory space of each processor having a small memory space is freely allocated, and each processor shares the memory allocated to the above-mentioned large memory space.