JPS5972781A - Photoelectric conversion semiconductor device - Google Patents
Photoelectric conversion semiconductor deviceInfo
- Publication number
- JPS5972781A JPS5972781A JP57184297A JP18429782A JPS5972781A JP S5972781 A JPS5972781 A JP S5972781A JP 57184297 A JP57184297 A JP 57184297A JP 18429782 A JP18429782 A JP 18429782A JP S5972781 A JPS5972781 A JP S5972781A
- Authority
- JP
- Japan
- Prior art keywords
- silicon nitride
- film
- thickness
- nitride film
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 23
- 238000006243 chemical reaction Methods 0.000 title claims abstract description 10
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 18
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 18
- 239000011521 glass Substances 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 239000013078 crystal Substances 0.000 claims description 10
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 3
- 229910052736 halogen Inorganic materials 0.000 claims description 3
- 150000002367 halogens Chemical class 0.000 claims description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims description 3
- 239000001257 hydrogen Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 5
- 239000003822 epoxy resin Substances 0.000 abstract description 4
- 229920000647 polyepoxide Polymers 0.000 abstract description 4
- 229910052782 aluminium Inorganic materials 0.000 abstract description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052710 silicon Inorganic materials 0.000 abstract description 2
- 239000010703 silicon Substances 0.000 abstract description 2
- 229910052709 silver Inorganic materials 0.000 abstract description 2
- 238000005245 sintering Methods 0.000 abstract description 2
- 238000005476 soldering Methods 0.000 abstract description 2
- 238000001771 vacuum deposition Methods 0.000 abstract description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 abstract 2
- 101100166823 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) CTF3 gene Proteins 0.000 abstract 1
- 230000006866 deterioration Effects 0.000 abstract 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 abstract 1
- 229910001887 tin oxide Inorganic materials 0.000 abstract 1
- 230000007797 corrosion Effects 0.000 description 4
- 238000005260 corrosion Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 230000007547 defect Effects 0.000 description 4
- 150000003839 salts Chemical class 0.000 description 3
- DGAQECJNVWCQMB-PUAWFVPOSA-M Ilexoside XXIX Chemical compound C[C@@H]1CC[C@@]2(CC[C@@]3(C(=CC[C@H]4[C@]3(CC[C@@H]5[C@@]4(CC[C@@H](C5(C)C)OS(=O)(=O)[O-])C)C)[C@@H]2[C@]1(C)O)C)C(=O)O[C@H]6[C@@H]([C@H]([C@@H]([C@H](O6)CO)O)O)O.[Na+] DGAQECJNVWCQMB-PUAWFVPOSA-M 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229910052708 sodium Inorganic materials 0.000 description 2
- 239000011734 sodium Substances 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- -1 sodium Chemical class 0.000 description 1
- 239000005341 toughened glass Substances 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Abstract
Description
【発明の詳細な説明】
この発明は、PNまたはP工N接合を少なくとも1つ有
する、水素またはハロゲン元素が添加された非単結晶半
導体に光照射を行なうととにより、光起電力を発生させ
るための光電変換半導体装置に関する。Detailed Description of the Invention The present invention generates photovoltaic force by irradiating a non-single crystal semiconductor doped with hydrogen or a halogen element and having at least one PN or P-N junction. The present invention relates to a photoelectric conversion semiconductor device.
本発明はかかる光電変換装置(フォト・ポルティック・
セル 即ち以下単K PVOという〕の信頼性を向上し
、大気中における長期間の使用において動作不良となる
重欠陥または動作劣化となる欠陥のいずれをも従来に比
べて少なくした高信頼性を達成することを目的としてい
る。The present invention provides such a photoelectric conversion device (photoportic
The reliability of the cell (hereinafter referred to as single K PVO) has been improved, and high reliability has been achieved with fewer major defects that cause malfunction or defects that degrade operation during long-term use in the atmosphere compared to the past. It is intended to.
従来非単結晶半導体を用いたPVOK関しては、その市
場が一般電卓用等の民生用であったため、特に強い光照
射または雨、塩害等のことを考慮することがなかった。Conventionally, the market for PVOK using non-single crystal semiconductors was for consumer use such as general calculators, so there was no consideration of particularly strong light irradiation, rain, salt damage, etc.
しかし本発明はアモルファスまたはセミアモルファス半
導体を含む非単結晶半導体において、外気での使用に耐
える、即ちばく露試験においてもf
10時間においてもきわめてわずかしか不良にならない
、即ち従来に比べて千倍以上もの高信頼性が得られるP
VCの構造をかかる非単結晶半導体およびその上面、下
面に設けられた第1および第2の電極よりなるPVOの
すべてを窒化珪素膜によシくるんだことを特徴としてい
る。However, the present invention provides a non-single crystal semiconductor including an amorphous or semi-amorphous semiconductor that can withstand use in the open air, that is, it exhibits only a very small amount of defects even in an exposure test for 10 hours, that is, more than 1,000 times more than the conventional method. P that provides high reliability
The structure of the VC is characterized in that all of the PVO consisting of the non-single crystal semiconductor and the first and second electrodes provided on the upper and lower surfaces of the non-single crystal semiconductor are enclosed in a silicon nitride film.
かくの如くにするととによυ、耐湿性の向上、耐光性の
向上さらに電極部よシの塩水の流入によるコロ−ジョン
の発生の防止にきわめてすぐれたものであった。By doing so, it was possible to improve the moisture resistance, the light resistance, and to prevent the occurrence of corrosion due to the inflow of salt water from the electrode portion.
第1図に従来の構造のたて断面図を示す。FIG. 1 shows a vertical sectional view of a conventional structure.
図面において、ガラス基板(1)、下側の第1の電極(
3)、PN″!、たはP工Nを少なくとも1つ有する非
単結晶半導体(4)、上側電極(5)、エポキシ樹脂E
4L(7)、外部引出し電極(8)、照射光00)よシ
なっている0
しかしこの構造において、ガラス基板はナトリューム等
のイオンを含み、これが透明導電膜(工TO8nOt等
をOTF (導電性透光性膜)という)中に拡散すると
、そのシート抵抗を増大させ、PvCとしての直列抵抗
の増大、即ち電流の減少に連がる。In the drawing, a glass substrate (1), a lower first electrode (
3), PN''!, or a non-single crystal semiconductor having at least one P-N (4), upper electrode (5), epoxy resin E
However, in this structure, the glass substrate contains ions such as sodium, which forms a transparent conductive film (TO8nOt, etc.). Diffusion into a translucent film (referred to as a transparent film) increases its sheet resistance, leading to an increase in series resistance as PvC, ie, a decrease in current.
またエポキシ(7)は必ずしも耐湿性にすぐれていない
ため、裏面電極(5)に対しコロ−ジョンを誘発してし
まう。さらにかかる温度はP工N−4たけPNの接合部
の露出部01ニ付着し、接合特性をよりリークってしま
い、結果として曲線因子の低下をもたらす。さらにエポ
キシ樹脂と外部引出し電極0均との密着不足によシ、電
極と上側電極との接点での酸化による接触不良を誘発す
る。これらの多くの信頼性上の問題点をとシのそくため
、本発明はなされている。Furthermore, since the epoxy (7) does not necessarily have excellent moisture resistance, it induces corrosion on the back electrode (5). Furthermore, such a temperature causes the bond to adhere to the exposed portion 01 of the bonded portion of the P-work N-4 and PN, further leaking the bonding characteristics, resulting in a decrease in the fill factor. Furthermore, insufficient adhesion between the epoxy resin and the external lead electrode causes poor contact due to oxidation at the contact point between the electrode and the upper electrode. The present invention has been devised to avoid many of these reliability problems.
第2図は本発明のPVCを窒化珪素膜でくるんだ構造の
集積化構造を示す。かかる集積化構造については、本発
明人の出願になる特許願(昭和5←90097、900
98.90099854゜7.16出願)K示されてい
る。FIG. 2 shows an integrated structure in which PVC of the present invention is wrapped with a silicon nitride film. Regarding such an integrated structure, the patent application filed by the present inventor (Showa 5←90097, 900
98.90099854゜7.16 Application)K shown.
図面において、ガラス基板(1)、かかる基板に密接し
た窒化珪素膜(2)、下側のOTF電極(3)、PN″
!。In the drawing, a glass substrate (1), a silicon nitride film (2) in close contact with such substrate, a lower OTF electrode (3), a PN''
! .
たはP工N接合を少なくとも1つ有する、水素またはハ
ロゲン元素の添加された非単結晶半導体(4)、上側電
極(5)、上側電極およびPN捷たはPIN接合の接合
部をおおう窒化珪素膜(6)、さらに有機樹脂膜(7)
よりなっている。外部引出し電極(8)は上側電極との
接触部に至る前に窒化珪素膜にておおわれている。a non-single crystal semiconductor (4) doped with hydrogen or a halogen element having at least one P-N junction; an upper electrode (5); silicon nitride covering the upper electrode and the junction of the P-N junction or PIN junction Film (6) and further organic resin film (7)
It's getting better. The external lead electrode (8) is covered with a silicon nitride film before reaching the contact portion with the upper electrode.
以上の構造を有せしめることによシ、接合部03での湿
気の侵入によるリークの発生の防止、裏面電極(6)(
一般にアルミニュームを用いるかまたは工TO+AIの
多層膜を用いる)のコロ−ジョンの発生の防止、外部引
出し電極(8)へのエポキシ樹脂との密着不良による部
分α望よりの湿気、塩分の侵入の(1ηの窒化珪素膜に
よるブロッキング、さらに基板ガラス(1)からのナト
リュームのOTFへの拡散によるOTFの導電性低下の
防止のすべてを完全にすることかできた。By having the above structure, it is possible to prevent the occurrence of leakage due to moisture intrusion at the joint 03, and prevent the back electrode (6)
In general, aluminum is used or a multilayer film of TO + AI is used) to prevent corrosion, and to prevent moisture and salt from entering the area due to poor adhesion of the epoxy resin to the external lead electrode (8). (Blocking by the silicon nitride film with a thickness of 1η and prevention of decrease in conductivity of the OTF due to diffusion of sodium from the substrate glass (1) into the OTF were completely completed.
これは本発明においては、第1および第3の電極さらに
その間にはさまれた接合部と側部に露出する半導体のす
べてを窒化珪素膜によシくるんでによシ、耐強化ガラス
と同様の効果を有することができた。このため従来lm
X2mの大きさのガラス基板の場合、3.2−4mmの
厚さを必要としたのが1〜2mmの厚さで同じ耐衝突性
を有せしめることができた。これで低価格化に大きな道
を開くことができた。特にシステムを組んだ場合、太陽
電池システム全体の軽量化をはかることができ、14E
−コストの低下をも有することができた。In the present invention, the first and third electrodes, the joint sandwiched between them, and all of the semiconductor exposed on the sides are covered with a silicon nitride film, similar to tempered glass. It was possible to have the effect of For this reason, conventional lm
In the case of a glass substrate having a size of 2 m, a thickness of 3.2 to 4 mm was required, but the same impact resistance could be achieved with a thickness of 1 to 2 mm. This has paved the way for lower prices. Especially when the system is assembled, the weight of the entire solar cell system can be reduced, and 14E
- Could also have lower costs.
以下に本発明の実施例を図面に従って説明する0実施例
1
第2図は1.2mm厚の4/3フィート×V4フイート
または30cm0のガラス板(1)K対し、約500℃
にてプラズマ気相法により窒化珪素膜を500−200
0を有して真空蒸着法および420’Oシンターにより
形成させた。次に下側よF) 5ixO,、(0<xイ
1)のP型半導体を100λ、さらに真性または実質的
に真性の工型珪素半導体を0.5μ、さらKN型半導体
を200Hの厚さに形成させた。その結果1つのP工N
接合を構成させた。この後さらにこの上に今一度P工N
をプラズマ気相法により積層せしめ、PINPIN接合
と2つのPIN、1つのPN接合を有せしめてもよい。Embodiments of the present invention will be described below with reference to the drawings. Embodiment 1 Figure 2 shows a glass plate (1) of 1.2 mm thick 4/3 feet x V4 feet or 30 cm 0 heated to approximately 500°C.
A silicon nitride film with a thickness of 500-200
0 by vacuum evaporation and 420'O sintering. Next, from the bottom side, a P-type semiconductor of 5ixO, (0<xI1) with a thickness of 100λ, an intrinsic or substantially intrinsic silicon semiconductor with a thickness of 0.5μ, and a KN-type semiconductor with a thickness of 200H. was formed. As a result, one P engineering N
A junction was constructed. After this, P-work N again on top of this.
They may be laminated by a plasma vapor phase method to form a PIN junction, two PIN junctions, and one PN junction.
さらにアルミニュームまたは銀を真空蒸着法により第2
の電極として形成した。これらの工程の際、マスクを配
セ(シ、第2図に示される如き集積化構造として、さら
に外部引出し電極0→を)・ンダ付により、または電気
溶接(スポット ウエルデインク)法により形成させた
。Furthermore, a second layer of aluminum or silver is applied using a vacuum evaporation method.
It was formed as an electrode. During these steps, the mask was formed by dispensing (in the integrated structure as shown in Figure 2, and further external lead electrodes), soldering, or electric welding (spot welding). .
さらにこれらすべてをおおって、第2の窒化珪素膜(6
)をプラズマ気相法により500−2000λの厚さに
200−250′Cの温度で形成させた。さらにこの後
印刷法によジェポキシ樹脂を印刷した。Furthermore, a second silicon nitride film (6
) was formed by plasma vapor phase method to a thickness of 500-2000 λ at a temperature of 200-250'C. Furthermore, after this, a jepoxy resin was printed using a printing method.
かくして第2図の構造を有せしめることができたO
第3図は本発明と従来例との信頼性テストをそれぞれサ
ンプル数20で行なった結果である。即ち第3図(A)
は本発明構造を示す。第3図(B)は第1図に示される
従来例の結果を示す。In this way, the structure shown in FIG. 2 was obtained. FIG. 3 shows the results of a reliability test for the present invention and the conventional example, each using 20 samples. That is, Figure 3 (A)
indicates the structure of the present invention. FIG. 3(B) shows the results of the conventional example shown in FIG.
初期値はともにその変換効率8係を有している。Both initial values have a conversion efficiency of 8.
しかし10〜10時間とふえるに従ってばく露試験中の
雨、紫外線、昇温により、従来例においては計13ケが
ショートまたはり−γの断線、電極のコロ−ジョンによ
り破損状態になってしまった。However, as the test time increased to 10 to 10 hours, due to rain, ultraviolet rays, and temperature rise during the exposure test, a total of 13 pieces in the conventional example were damaged due to short circuits, disconnection of the girders, and corrosion of the electrodes. .
さらに特性も曲想UKみられる如<、’l’純に劣化し
、さらに各サンプルの値の分散は大きい。Furthermore, the characteristics are completely degraded as seen in the song UK, and furthermore, the variance of the values of each sample is large.
それに対し本発明の構造においては、第3図にみられる
如く、初期にわずかに効率が低下するが分散は少なく、
7〜8係の効率を10時間たっても有していた。さらK
o/s (オープンまたはショート)不良も10’時
間で1ケであり、従来例に比べて子丸率(フィツト数)
を1/100〜11500 Kすることがわかった。On the other hand, in the structure of the present invention, as shown in Fig. 3, the efficiency decreases slightly at the beginning, but the dispersion is small.
It had the efficiency of 7-8 units even after 10 hours. Sara K
There was only one o/s (open or short) defect in 10' hours, and the rounding rate (number of fits) was lower than that of the conventional example.
was found to be 1/100 to 11,500 K.
以上のことより、本発明はかかる大気、太陽にさらされ
る非単結晶半導体を用いた光電変換装置において、電極
、半導体のすべてを窒化珪素膜でくるんだことの価値が
きわめて大きいことが判明した。From the above, it has been found that in the present invention, in a photoelectric conversion device using a non-single crystal semiconductor exposed to the atmosphere and the sun, it is extremely valuable to wrap all the electrodes and the semiconductor with a silicon nitride film.
第1図は従来の構造の光電変換装置を示す。 第2図は本発明の構造の光電変換装置を示す。 第3図は信頼性テストの結果を示す。 FIG. 1 shows a photoelectric conversion device with a conventional structure. FIG. 2 shows a photoelectric conversion device having the structure of the present invention. Figure 3 shows the results of the reliability test.
Claims (1)
設け、該窒化珪素膜上に電極を構成する第1の透光膜と
、該膜上にPNまたはP工N接合を少なくとも1つ有す
る水素またはハロゲン元素が添加された非単結晶半導体
を設け、該膜上に第2の電極を構成する導電性膜と該膜
および前記非単結晶半導体とをくるんで窒化珪素膜を設
けることを特徴とする光電変換半導体装置。 2、特許請求の範囲第1項において、透光性ガラス基板
の光照射面は窒化珪素膜がコーティングされたことを特
徴とする光電変換半導体装置。[Claims] 1. A silicon nitride film is provided on the surface of a transparent glass substrate, and a first transparent film constituting an electrode is formed on the silicon nitride film, and a PN film is formed on the silicon nitride film. Alternatively, a non-single-crystal semiconductor doped with hydrogen or a halogen element having at least one P-N junction is provided, and a conductive film constituting the second electrode, the film, and the non-single-crystal semiconductor are provided on the film. A photoelectric conversion semiconductor device characterized by being provided with a wrapped silicon nitride film. 2. A photoelectric conversion semiconductor device according to claim 1, wherein the light irradiation surface of the transparent glass substrate is coated with a silicon nitride film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57184297A JPS5972781A (en) | 1982-10-20 | 1982-10-20 | Photoelectric conversion semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57184297A JPS5972781A (en) | 1982-10-20 | 1982-10-20 | Photoelectric conversion semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5972781A true JPS5972781A (en) | 1984-04-24 |
JPS6262073B2 JPS6262073B2 (en) | 1987-12-24 |
Family
ID=16150862
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57184297A Granted JPS5972781A (en) | 1982-10-20 | 1982-10-20 | Photoelectric conversion semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5972781A (en) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8283667B2 (en) | 2008-09-05 | 2012-10-09 | Semiconductor Energy Laboratory Co., Ltd. | Thin film transistor |
US8304775B2 (en) | 2009-03-09 | 2012-11-06 | Semiconductor Energy Laboratory Co., Ltd. | Thin film transistor |
US8338240B2 (en) | 2010-10-01 | 2012-12-25 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing transistor |
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1982
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Also Published As
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