JPS5972748A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5972748A JPS5972748A JP18383082A JP18383082A JPS5972748A JP S5972748 A JPS5972748 A JP S5972748A JP 18383082 A JP18383082 A JP 18383082A JP 18383082 A JP18383082 A JP 18383082A JP S5972748 A JPS5972748 A JP S5972748A
- Authority
- JP
- Japan
- Prior art keywords
- conductive
- semiconductor device
- cover
- affected
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置に係シ、特にＭＯＳ（ｍｅｔａｌｏ
ｘｉｄｅ ｓｅｍｉｃｏｎｄｕｃｔｏｒ）形のＩＣ（集
積回路）の保護構造に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to semiconductor devices, particularly MOS (metallo
The present invention relates to a protection structure for an IC (integrated circuit) of the xide semiconductor type.
従来のＭＯＳ形のＩＣでは、外部摩擦等によってそ−ル
ドパッケージ表面が帯電した場合、ゲート保護のトラン
ジスタが働きにくいという現象がある。例えば、第１図
に示すように、Ｎｃｈａｎｎｅ １０ＭＯ８形ＩＣのモ
ールドパッケージ表面３がプラスに帯電した場合、半導
体プレットに形成された保護トランジスタのゲートＧは
マイナスに誘起され、ソースＳとドレインＤ間のチャン
ネル表面５にはプラス電荷が誘起される。この為、保護
トランジスタのしきい値電圧（ＶＴ）は高くなシ、ＯＮ
（導通）しにくい状態となる。したがって、過電圧がか
かっても、保護回路は働かず、このため入出力トランジ
スタ（図示せず）のゲートへの直接負担がかかシ、入出
力端子が破壊されてしまうことがある。このように、Ｎ
ｃｈａｎｎｅｌ形ではモールドパッケージ表面３がプラ
スに帯電した時、Ｐｃｈａｎｎｅｌ形ではモールドパッ
ケージ表面３がマイナスに帯電した時、いずれも静電気
等の過電圧に対して極めて弱い状態となってしまう（〔
表〕参照）。In conventional MOS type ICs, when the surface of the cold package becomes electrically charged due to external friction or the like, there is a phenomenon in which the gate protection transistor does not work easily. For example, as shown in FIG. 1, when the mold package surface 3 of the Nchanne 10MO8 type IC is positively charged, the gate G of the protection transistor formed on the semiconductor plate is induced to be negative, and the voltage between the source S and drain D is A positive charge is induced on the channel surface 5. Therefore, the threshold voltage (VT) of the protection transistor is not high, and the ON
(conductivity) becomes difficult. Therefore, even if an overvoltage is applied, the protection circuit does not work, and this places a direct load on the gate of an input/output transistor (not shown), which may destroy the input/output terminal. In this way, N
When the mold package surface 3 of the channel type is positively charged, and when the mold package surface 3 of the Pchannel type is negatively charged, both become extremely vulnerable to overvoltage such as static electricity ([
(see table).
本発明の目的は、以上のような問題を改善し、外部電界
および雑音が半導体ペレットに影響をおよぼさないよう
にした半導体装置を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and provide a semiconductor device in which external electric fields and noise do not affect semiconductor pellets.
本発明は、半導体ペレットの主面上に導電性の保護カバ
ーを設けたことを特徴とする半導体装置にある。The present invention resides in a semiconductor device characterized in that a conductive protective cover is provided on the main surface of a semiconductor pellet.
次に図面を参照して本発明の詳細な説明する。Next, the present invention will be described in detail with reference to the drawings.
第２図は本発明の実施例の半導体装置を示した断面図で
ある。本実施例に示すように、半導体ペレット２が導電
体カバー１で覆われている為、たとえモールドパッケー
ジ表面が帯電しても電界の影響はまったく受けないこと
になる。特に、導電体カバー１をリード４のＧＮＤ（接
地）ビンと接合されれば、導電体カバー１に誘起された
電荷が接地へ逃げる為さらに好ましい状態となる０本構
造は、ＩＣの外部雑音に対しても有効な手段と々る０
以上のように、本発明によれば、外部電界や外部雑音に
影響されることない極めて信頼性の高い半導体装置が得
られる。FIG. 2 is a sectional view showing a semiconductor device according to an embodiment of the present invention. As shown in this embodiment, since the semiconductor pellet 2 is covered with the conductor cover 1, even if the surface of the mold package is charged, it will not be affected by the electric field at all. In particular, if the conductor cover 1 is connected to the GND (ground) pin of the lead 4, the electric charge induced in the conductor cover 1 will escape to the ground, so the zero-wire structure will be in a more favorable state. As described above, according to the present invention, an extremely reliable semiconductor device that is not affected by external electric fields or external noise can be obtained.
第１図は従来の半導体装置の断面図、第２図は本発明の
実施例の半導体装置を示す断面図である。
面図において、
１・・・・・・導電性カバー、２・・・・・・半導体ベ
レット、３・・・・・・モールドパッケージ表面、４・
・・・・・リード、５・・・・・・チャンネル、Ｓ・・
・・・・ソース、Ｇ・・・・・・ゲート、Ｄ・・・・・
・ドレイン〇FIG. 1 is a sectional view of a conventional semiconductor device, and FIG. 2 is a sectional view of a semiconductor device according to an embodiment of the present invention. In the top view, 1... Conductive cover, 2... Semiconductor pellet, 3... Molded package surface, 4...
...Lead, 5...Channel, S...
...Source, G...Gate, D...
・Drain〇
Claims (1)
たことを特徴とする半導体装置。A semiconductor device characterized in that a conductive storage cuckoo is provided on the main surface of a semiconductor pellet.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18383082A JPS5972748A (en) | 1982-10-20 | 1982-10-20 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18383082A JPS5972748A (en) | 1982-10-20 | 1982-10-20 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5972748A true JPS5972748A (en) | 1984-04-24 |
Family
ID=16142586
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18383082A Pending JPS5972748A (en) | 1982-10-20 | 1982-10-20 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5972748A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62183545A (en) * | 1986-02-07 | 1987-08-11 | Rohm Co Ltd | Electronic parts |
| JPS6437043A (en) * | 1987-07-31 | 1989-02-07 | Nec Corp | Resin-sealed semiconductor device |
| JPH02119166A (en) * | 1988-10-27 | 1990-05-07 | Nec Corp | Resin-sealed semiconductor device |
| JPH02278752A (en) * | 1989-04-19 | 1990-11-15 | Mitsubishi Electric Corp | Semiconductor device |
| US5350943A (en) * | 1992-04-18 | 1994-09-27 | Temic Telefunken Microelectronic Gmbh | Semiconductor assembly, in particular a remote control reception module |
| FR2707798A1 (en) * | 1993-07-12 | 1995-01-20 | Telecommunications Elect | A method of encapsulating a power semiconductor device and encapsulation made by this method. |
| US5394014A (en) * | 1990-11-28 | 1995-02-28 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device improved in light shielding property and light shielding package |
| JPH08236652A (en) * | 1995-02-28 | 1996-09-13 | Nec Corp | Hybrid integrated circuit device |
| DE4143494C2 (en) * | 1990-11-28 | 1998-05-14 | Mitsubishi Electric Corp | Semiconductor device with reduced housing thickness and wt. |
-
1982
- 1982-10-20 JP JP18383082A patent/JPS5972748A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62183545A (en) * | 1986-02-07 | 1987-08-11 | Rohm Co Ltd | Electronic parts |
| JPS6437043A (en) * | 1987-07-31 | 1989-02-07 | Nec Corp | Resin-sealed semiconductor device |
| JPH0567069B2 (en) * | 1987-07-31 | 1993-09-24 | Nippon Electric Co | |
| JPH02119166A (en) * | 1988-10-27 | 1990-05-07 | Nec Corp | Resin-sealed semiconductor device |
| JPH02278752A (en) * | 1989-04-19 | 1990-11-15 | Mitsubishi Electric Corp | Semiconductor device |
| US5394014A (en) * | 1990-11-28 | 1995-02-28 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device improved in light shielding property and light shielding package |
| DE4143494C2 (en) * | 1990-11-28 | 1998-05-14 | Mitsubishi Electric Corp | Semiconductor device with reduced housing thickness and wt. |
| US5350943A (en) * | 1992-04-18 | 1994-09-27 | Temic Telefunken Microelectronic Gmbh | Semiconductor assembly, in particular a remote control reception module |
| FR2707798A1 (en) * | 1993-07-12 | 1995-01-20 | Telecommunications Elect | A method of encapsulating a power semiconductor device and encapsulation made by this method. |
| JPH08236652A (en) * | 1995-02-28 | 1996-09-13 | Nec Corp | Hybrid integrated circuit device |
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