JPS5972729U - semiconductor equipment - Google Patents
semiconductor equipmentInfo
- Publication number
- JPS5972729U JPS5972729U JP1982169142U JP16914282U JPS5972729U JP S5972729 U JPS5972729 U JP S5972729U JP 1982169142 U JP1982169142 U JP 1982169142U JP 16914282 U JP16914282 U JP 16914282U JP S5972729 U JPS5972729 U JP S5972729U
- Authority
- JP
- Japan
- Prior art keywords
- conductive plate
- pellet
- semiconductor equipment
- abstract
- shape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8336—Bonding interfaces of the semiconductor or solid state body
- H01L2224/83365—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10158—Shape being other than a cuboid at the passive surface
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図、第２図は従来の半導体装置を示す縦断面図及び
一部断面図、第３図、第４図は他の従来構成を示す縦断
面図、第５図は本考案に係る導電板の一例を示す斜視図
、第６図は本考案の実施例を示す半導体装置の縦断面図
である。
１・・・半導体ペレット、２・・・ガラスパシベーショ
ン、３・・・下部電極、１０・・・治具、１１・・・下
部電極、１２ａ、、１２ｂ・・・ろう材。1 and 2 are vertical cross-sectional views and partial cross-sectional views showing conventional semiconductor devices, FIGS. 3 and 4 are vertical cross-sectional views showing other conventional configurations, and FIG. 5 is a conductive diagram according to the present invention. FIG. 6 is a perspective view showing an example of a plate, and FIG. 6 is a longitudinal sectional view of a semiconductor device showing an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Semiconductor pellet, 2... Glass passivation, 3... Lower electrode, 10... Jig, 11... Lower electrode, 12a, 12b... Brazing material.
Claims (1)
部電極にろう付は結合してなるものにおいて、前記導電
板は、その上面を前記電極に対向するペレットの一主面
とほぼ同一形状とし、その底面をペレットの輪郭とほぼ
同一形状としたことを特徴とする半導体装置。A glass passivation type pellet is brazed to a lower electrode via a conductive plate, and the conductive plate has an upper surface having approximately the same shape as one main surface of the pellet facing the electrode, and a bottom surface of the conductive plate. A semiconductor device characterized by having a shape almost identical to the outline of a pellet.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1982169142U JPS5972729U (en) | 1982-11-08 | 1982-11-08 | semiconductor equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1982169142U JPS5972729U (en) | 1982-11-08 | 1982-11-08 | semiconductor equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5972729U true JPS5972729U (en) | 1984-05-17 |
Family
ID=30369589
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1982169142U Pending JPS5972729U (en) | 1982-11-08 | 1982-11-08 | semiconductor equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5972729U (en) |
-
1982
- 1982-11-08 JP JP1982169142U patent/JPS5972729U/en active Pending
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