JPS5971504A - Signal selecting device - Google Patents

Abstract

PURPOSE:To attain extraction of a correct signal without deteriorating redundancy by using a difference between a selected signal and other signal as a selecting value if the difference does not exceed a limit, in a signal processor having a function processing a failure. CONSTITUTION:When a failure discriminating circuit 4 discriminates a state that it is not a failure, a selecting circuit 2 selects and outputs a signal of a signal series having a number selected before and stores the value for the next processing to a register 5. When it is discriminated as a failure, an operating signal of the selection circuit is set with the state of each signal system and a normal signal series or a signal selected before is outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal processing device having a fault-tolerant function, and more particularly to a signal selection device for selecting a correct signal from the same signal sent by multiple systems.

In general, in systems that require high reliability such as airplane control systems and space shuttle signal processing systems, where failures must not occur in the signal system, signals are transmitted using three or five parallel systems. are doing. In such a transmission system, it is necessary to select the correct signal from among these multiplexed signals.

Conventionally, in signal processing devices having such a fault-tolerant function, a method using the average value of all signals or a method using the intermediate value of all signals has been adopted as a method for selecting the correct signal from multiple signals of the same type. However, in the former method, if one signal takes an extremely different value, the selected signal value will also deviate from the correct value, and the signal processing system will not operate normally. The latter method can prevent this problem, but has the following problems. for example,
As shown in the waveform diagram of FIG. 1, when the number of signals is 3 and each signal S, -%-83 changes, the selected intermediate selected value Se (dotted line) becomes the actual signal value (Sl, 82
, Sa) had the disadvantage of more rapid changes.

FIG. 2 is a block diagram of a conventional signal selection circuit. This example uses three signals S! ~S3 outputs an intermediate value or an average value, and includes a comparison circuit 1 that compares the input signals S and ~Ss to determine the state of each signal, and a signal S depending on the output of this comparison circuit.

.about.S3, and a temporary memory 3 for the previous selection. First, at the comparison time w51, the signal S1
If the value of these differences is smaller than a predetermined limit value, it is determined that the signal generation is normal; otherwise, it is determined that there is a failure, and the other signals S, , Sa are determined. A similar determination is made for S. Using the determination results of these signals 81 to S8, the selection circuit 2 outputs an intermediate value when all three signals are normal, an average value when two signals are normal, and an average value when one signal is normal. The signal value is output, and when there is no normal signal, the previous selected value stored in the memory 3 is output. In this case, the above-mentioned problem exists.An object of the present invention is to select one of a plurality of signals in advance, and to select the signal if the difference between this signal and other signals exceeds a predetermined limit. It is an object of the present invention to provide a signal selection device which solves the above-mentioned drawbacks and has excellent redundancy against failures by using a signal as a selection value.

The configuration of the signal selection device of the present invention includes a selection circuit that receives the same signal sent by three or more signal sequences and selects one normal signal from among them, and a signal number selected from this selection circuit. A comparison circuit that inputs the signals of each signal series and compares these signals with other signals to determine whether the signal status of each series is normal or faulty, and a comparison circuit for temporarily storing a number register. a failure determination circuit that determines whether or not the state of the previously selected signal number of the number register among the outputs is a failure; A signal of a signal series having a signal number is selected and outputted, and when the failure determination circuit determines that there is a failure, a normal signal series or a previously selected signal is output depending on the state of each signal series. do.

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 3 is a signal waveform diagram of an embodiment of the present invention.

This embodiment shows a case where one signal S8 (dotted line) is selected from among the signals SIt 82 + 83 at the time of starting signal selection. Thereafter, if the difference between this signal Se and another signal is less than a predetermined limit, this signal is taken as the selected value Se. This Se changes in the same way as the raw signal value as long as the selected signal does not fail, so it has little negative effect on subsequent signal processing using the selected signal value. FIG. 4 is a block diagram of an embodiment of the present invention.

In this embodiment, a failure determination circuit 4 and a number register 5 for storing the number of the selected signal system are added to FIG. That is, the number register 5 temporarily stores the number of the signal (eg, St) selected by the selection circuit 2. Next, the failure determination circuit 4 receives each signal state of normal or failure determined by the comparator circuit 1, and selects a signal to be outputted only when the temporarily stored previous signal S2 is “failure”. The circuit operation signal is set to "ON", and the selection circuit 2 operates in the same manner as before to take in each of the signals 81 to S3. Also, the failure determination circuit 4 changes the temporarily stored previous signal S2 to "normal". If it is determined that this is the case, the selection circuit activation signal is turned off, the signal number (S,) stored in the number register 5 is selected, the signal selection value (S2) is output, and the selection circuit operation signal is turned off. The value for is stored in register 5. Therefore, if the selected signal is normal, the normal signal is outputted one after another, and when a failure occurs, it is switched to another normal signal.

In addition, a control system that requires high-speed control conventionally requires a filter for the signal itself and a filter for removing the influence of signal selection, but in the signal selection of the present invention, only a filter for the signal itself is required. In addition, the filter becomes simpler, and the high-speed changing signals that have been removed by the filter for signal selection are directly transmitted to the control processing, improving the response characteristics of the control system.

As explained above, according to the signal selection device of the present invention,
This has the effect that it is possible to extract the correct raw signal as much as possible without compromising redundancy against signal failures, and it is possible to realize a signal processing system that is closer to the ideal.

[Brief explanation of the drawing]

FIG. 1 is a waveform diagram of a conventional signal selection method, FIG. 2 is a block diagram of a conventional signal selection device, FIG. 3 is a waveform diagram explaining the signal selection method of the present invention, and FIG. 4 is an implementation of the present invention. FIG. 2 is an example block diagram. In the figure, 511S2+S3...
・Input signal, Se...Selection signal, 1...
... Comparison circuit, 2 ... Selection circuit, 3 ...
・Temporary memory circuit, 4... Failure determination circuit, 5...
...This is a number register.

Claims (1)

[Claims] a selection circuit that receives the same signals sent by three or more signal sequences and selects one normal signal from among them; a number register that temporarily stores the signal number selected from the selection circuit; and each of the signals. A comparison circuit inputs each series of signals and compares these signals with other signals to determine whether the signal status of each series is normal or faulty; a failure determination circuit that determines whether the state of the signal number selected is a failure, and the selection circuit selects a signal of the signal series of the previously selected signal number when the failure determination circuit determines that the state of the signal number is not a failure. A signal selection device which selects and outputs a signal, and outputs a normal signal sequence or a previously selected and output signal depending on the state of each signal sequence when the failure determination circuit determines a failure.