JPH10145878A - Protection switch - Google Patents

Abstract

PROBLEM TO BE SOLVED: To always monitor the normalcy of an n:1 selector by providing a select signal preparation circuit for preparing a signal to select any fixed pattern and inserting this signal into a switching control signal and a monitor circuit for detecting the abnormality of the n:1 selector based on the output signal of the n:1 selector. SOLUTION: A switching signal 1 from the outside is inputted to a select signal preparation circuit 4. At the select signal preparation circuit 4, the switching signal is outputted as it is in the data block of input data and a control signal for respectively selecting data signals A-1 and B-1 for one byte in the respective front and latter halves forcedly in the idle time slot block of two bytes is outputted to a 2:1 selector circuit 3. Then, a data signal C is outputted from the 2:1 selector circuit 3. This signal is inputted to the input terminal of a monitor circuit 5 as well. At the monitor circuit 5, it is monitored that one byte in the respective front and latter halves is fixed patterns A and B for each idle time slot block and when they are not coincident, it is judged the 2:1 selector circuit 3 is not normal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monitoring circuit for constantly monitoring the normality of an n: 1 selector (protection switch function) for switching data of n systems by external control.

[0002]

2. Description of the Related Art Conventionally, a protection switch for switching data of n systems by an n: 1 selector by external control performs switching of an n: 1 selector, and checks whether the n: 1 selector operates normally in accordance with the external control. No monitoring was done.

[0003]

In the conventional protection switch, since it is not monitored whether the n: 1 selector operates normally according to the external control, a serious influence is caused when the protection switch does not operate normally. It cannot be used in an externally exposed system. Because of this, traditionally for such systems,
It has been desired to constantly monitor the normality of the protection switch without affecting the data signal.

[0004]

The protection switch according to the present invention has an n: 1 selector, which receives n-system signals and selects and outputs n-system signals in accordance with an external switching control signal. A multiplexing circuit that inserts different fixed patterns into empty sections of n-system signals on the input side of the 1 selector and a selection signal that sequentially selects fixed patterns in empty sections of n-system signals are created. A selection signal generation circuit for inserting the selection signal into the switching control signal; and a monitoring circuit for detecting an abnormality of the n: 1 selector based on an output signal of the n: 1 selector in an empty section of the n signals. It is provided with.

[0005]

FIG. 1 is a block diagram showing a configuration of a protection switch according to an embodiment of the present invention. In the figure, 1 is a multiplexing circuit A for periodically multiplexing a fixed pattern on a data signal A, 2 is a multiplexing circuit B for periodically multiplexing a fixed pattern different from the multiplexing circuit A1 on a data signal B, 3 is a multiplexing circuit A1 and A 2: 1 selector circuit to which an output signal of the multiplexing circuit B2 is input, a selection signal generation circuit 4 for generating a switching control signal for confirming the normality of the 2: 1 selector circuit 3, and a 5: 1 2: 1 selector circuit 3 is a monitoring circuit that detects an abnormality of the 2: 1 selector circuit 3 from the output signal of 3 and outputs an abnormal signal.

In this embodiment, as a prerequisite, the input data signals A and B are assumed to be a data array having an unused section (empty time slot) every certain fixed period. Here, as an example, as shown in FIG. 2, the input signals A and B are a repetitive array having 12 bytes of data and 2 bytes of space, as shown in FIG.

Then, the data signal A is input to the input terminal of the multiplexing circuit A1, and the multiplexing circuit A1 stores a fixed pattern A (for example,
“00110101”), and the data signal A-1 in which the fixed pattern A is inserted, that is, the output of the multiplexing circuit A is input to one input terminal of the 2: 1 selector circuit 3.

Similarly, the data signal B of the other system is input to the input terminal of the multiplexing circuit B2,
In this example, a fixed pattern B (for example, "11001010") is inserted into 2 bytes of an empty time slot of the data signal B, and the data signal B-1 into which the fixed pattern B is inserted, that is, the output of the multiplexing circuit B2 is a 2: 1 selector. It is input to the other input terminal of the circuit 3.

Here, the selection signal generation circuit 4 for generating a switching control signal for the 2: 1 selector circuit 3 will be described. First, the switching signal 1 from the outside is input to the input terminal of the selection signal generation circuit 4. Then, the selection signal generation circuit 4 outputs the switching signal 1 as it is in the data section of 12 bytes of the input data, and forcibly applies the data signal A-
1 and the latter one byte output a control signal for selecting the data signal B-1 to the 2: 1 selector circuit 3.

Then, a data signal C is output from the 2: 1 selector circuit 3 as an output signal. This data signal C is a data signal A or data signal B specified by the switching signal 1 in a data section of 12 bytes. Data
In the empty time slot section, the first byte is a fixed pattern A (“00110101”), and the second byte is a fixed pattern B (“11001010”).

The data signal C is sent to the data processing unit and is input to the input terminal of the monitoring circuit 5. In the monitoring circuit 5, the first byte of the first half of each free time slot section is a fixed pattern A (“0011010
1)), the last byte is fixed pattern B (“1100101
0 "), and if they do not match, it is determined that the 2: 1 selector circuit 3 is not operating normally, and an abnormal signal is output.

Next, the operation of this embodiment will be described. FIG. 3 is an explanatory diagram for explaining signals in each section of this embodiment. First, the data signals A and B in which the fixed patterns A and B are inserted by the multiplexing circuits 1 and 2 for the two systems of data signals A and B, respectively.
-1 and the data signal B-1 are as shown in FIGS.

A switching control signal 1 input from the outside as shown in FIG.
Thus, as shown in FIG. 3D, a control signal for alternately selecting the data signal A-1 and the data signal B-1 in the empty time slot section is provided. In addition,
Here, the logic of the switching control is “L” level for selecting the data signal A-1 side, and “H” level for selecting the data signal B-1 side.

Here, when the 2: 1 selector 3 is operating normally, the data signal C-1 which is its output signal is output.
As shown in FIG. 3 (e), the empty time slot section has a fixed pattern A ("00110101") and a fixed pattern B
(“11001010”) is output, but if the 2: 1 selector 3 is malfunctioning and is not operating normally, for example, the data signal B-1 cannot be selected, and In the case of a failure in which only the signal output A-1 side is selected, as shown in (f) of FIG.
(“00110101”) and the fixed pattern A (“00110101”) are output.

In the monitoring circuit 5, the output signal from the 2: 1 selector 3 is converted into a fixed pattern A (“00110101”) and a fixed pattern B (“1100
1010 "), and if the fixed pattern is expected, the 2: 1 selector is determined to be normal. Conversely, if the empty time slot section is not the fixed pattern, the 2: 1 selector is determined to be 2: 1. The selector 3 determines a failure and outputs an abnormal signal.

In this embodiment, on the input side of the 2: 1 selector 3, different fixed patterns are inserted into the empty sections of the two input signals, and the fixed patterns are inserted into the 2: 1 selector 3 within the empty sections. Since the selection is made alternately, it is determined whether the fixed pattern of the output signal from the 2: 1 selector 3 matches the expected fixed pattern, and the failure of the 2: 1 selector 3 is determined. The normality of the 2: 1 selector 3 can be constantly monitored without affecting the input signal.

In this embodiment, the example of the 2: 1 selector 3 has been described. However, the n: 1 selector is used, and different fixed patterns are inserted into the empty sections so that n:
It is also possible to have one selector select those fixed patterns in an empty section and determine the failure of the n: 1 selector based on the output signal.

[0018]

As described above, according to the present invention, the multiplexing circuit inserts different fixed patterns into vacant sections of the n-system signals at the input side of the n: 1 selector to select the selection signal. A creation circuit creates a selection signal for sequentially selecting a fixed pattern in an empty section of the n-system signal, inserts the selection signal into the switching control signal, and a monitoring circuit in the empty section of the n-system signal. Since the abnormality of the n: 1 selector is detected based on the output signal of the n: 1 selector, the normality of the n: 1 selector can be constantly monitored without affecting the original input signal. Has an effect.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a protection switch according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram for explaining a data array of an input signal.

FIG. 3 is an explanatory diagram for explaining a signal in each unit of the embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Multiplexer A 2 Multiplexer B 3 2: 1 selector circuit 4 Selection signal creation circuit 5 Monitoring circuit

Claims (2)

[Claims] 1. An n: 1 selector which receives n-system signals and selects and outputs the n-system signals according to a switching control signal from the outside; and an n-system selector at an input side of the n: 1 selector. A multiplexing circuit that inserts a different fixed pattern into each of the empty sections of the signal, and a selection signal that sequentially selects the fixed pattern in the empty section of the n-system signals is created. A selection signal generation circuit to be inserted into the switching control signal; and a monitoring circuit that detects an abnormality of the n: 1 selector based on an output signal of the n: 1 selector in an empty section of the n systems of signals. A protection switch characterized by the following. 2. An n: 1 selector which receives n-system signals and selects and outputs the n-system signals according to a switching control signal from the outside; and an n-side selector at an input side of the n: 1 selector. A multiplexing circuit that inserts a different fixed pattern into each of the empty sections of the signal, and a selection signal that sequentially selects the fixed pattern in the empty section of the n-system signals is created. A selection signal generation circuit to be inserted into the switching control signal; and when the output signal of the n: 1 selector is a signal corresponding to the selection signal in an empty section of the n system signals, the n: 1 selector is determined to be normal. A monitoring circuit that determines that the n: 1 selector is abnormal when the output signal of the n: 1 selector is not a signal corresponding to the selection signal and outputs an abnormal signal; A protection switch characterized in that: