JPS5968027A - Variable output constant voltage circuit - Google Patents
Variable output constant voltage circuitInfo
- Publication number
- JPS5968027A JPS5968027A JP17486882A JP17486882A JPS5968027A JP S5968027 A JPS5968027 A JP S5968027A JP 17486882 A JP17486882 A JP 17486882A JP 17486882 A JP17486882 A JP 17486882A JP S5968027 A JPS5968027 A JP S5968027A
- Authority
- JP
- Japan
- Prior art keywords
- constant voltage
- voltage circuit
- threshold value
- variable
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、絶縁ゲート電界効果トランジスタ(以下工G
FETと称す)に工す構成される集積回路における定電
圧回路に関するものである、一般に、工GFET集積回
絡で使用される定電圧回路では、電源電圧が変わっても
出力が変イビシ力い工うに、出力が工GIMCTのしき
い値やに値だげで表わこれるような回路構成をとってい
た。DETAILED DESCRIPTION OF THE INVENTION The present invention provides an insulated gate field effect transistor (hereinafter referred to as an insulated gate field effect transistor).
This relates to a constant voltage circuit in an integrated circuit built into a GFET (FET).Generally, in a constant voltage circuit used in an integrated GFET circuit, the output changes even when the power supply voltage changes. In other words, the circuit configuration was such that the output could be expressed in terms of the threshold value of the GIMCT.
第1図に従来の定電圧回路の一実施例を示+2IGFE
T 1はデプレッション形で、しきい値はVTD %に
値をKD とする、工GFBT2はエンハンスメント
形でしきい値はVTR,K値けKJ とする7端子5
と電源のマイナスllj Vlll+ 4間に電源電圧
に依ら斤い定電圧出力vconstは、VTn、 VT
入KD、にχに工って、
vcons t = VTIA JW VTD ・
= −(1)と表わすことが出来る。(1)式から出力
Vconstは電源電圧に依らず一定である。しかし、
しきい値及びに値は集積回ド製造時に決捷っでしまうた
め、製造後に出力電圧を変えることは不可能であり、も
し、定電圧出力を変えたい矛らば、い(つかのIGFE
Tを集積回路上に用意し、そわをト1)ハングすること
により接ぎ換える等の方法がとられ、回路実装後に定電
圧出力を調整することは困難であった。Figure 1 shows an example of a conventional constant voltage circuit.
T1 is a depression type, the threshold value is VTD %, the value is KD, and GFBT2 is an enhancement type, the threshold value is VTR, and the value is KJ.7 terminals 5
The constant voltage output vconst between the negative llj Vllll+4 of the power supply and the power supply voltage is VTn, VT
Input KD, make χ, vcons t = VTIA JW VTD ・
It can be expressed as = -(1). From equation (1), the output Vconst is constant regardless of the power supply voltage. but,
Since the threshold and voltage values are determined during the manufacture of the integrated circuit, it is impossible to change the output voltage after manufacture.If you want to change the constant voltage output,
Methods such as preparing a T on an integrated circuit and replacing it by hanging it have been used, and it has been difficult to adjust the constant voltage output after the circuit is mounted.
本発明の目的は、定電圧回路の出力を、集積回路製造後
、電気的に容易に可変とすることにある7以下実施例に
従い本発明の詳細な説明する一第2図は本発明の一実施
例である。工GFET6は、デプレッション形で、その
しきい値を変えられるように浮遊ゲート下GFET又は
、MNO8構造などの2層絶縁膜系工GFETである一
第2図中7は、浮遊ゲートであるか又はゲート下の2つ
の絶縁膜の界面であるかを表わし、しきい値が可変e工
GFETであることを示す。この工GFET乙のドレイ
ンは、電源のプラス側VDD3に接続ツワ、ゲート及び
ソースは共にもう一方のエンハンスメント彫工GFFi
T 2のゲート及ヒトレインに接続されている、IGF
ET2のソースは電源のマイナス側V884に接続され
ている。An object of the present invention is to electrically easily vary the output of a constant voltage circuit after manufacturing an integrated circuit. This is an example. The engineering GFET 6 is a depletion type GFET with a floating gate under which the threshold value can be changed, or a two-layer insulating film type GFET such as an MNO8 structure. 7 in Fig. 2 is a floating gate or This indicates whether it is an interface between two insulating films under the gate, and indicates that the threshold value is a variable electronics GFET. The drain of this GFET is connected to the positive side VDD3 of the power supply, and the gate and source are both connected to the other enhancement GFFi.
IGF connected to the gate of T2 and the human train
The source of ET2 is connected to the negative side of the power supply V884.
定電圧出力は、端子5と電源のマイナス側Vss4の間
に出力される、本発明は、工GFFiT6を、しきい値
が自由に制御できるように、第3図に示す工うな浮遊ゲ
ート構造工GFEとするか、あるいは、第4図に示す工
うなMNO8構造などの2層絶縁脱果IGFKTとし友
ことを特徴としている。A constant voltage output is output between the terminal 5 and the negative side Vss4 of the power supply.The present invention uses a floating gate structure as shown in FIG. 3 to freely control the threshold value of the GFFiT6. It is characterized by being a GFE or a two-layer insulating IGFKT such as the unconventional MNO8 structure shown in FIG.
周知のように、第3図の浮遊ゲート構造の工GFETは
、浮遊ゲート8に注入される電荷量を変えることによシ
、しきい値を連続的に変λることかできる。着た第4図
の2層絶縁膜系のlG11’ETは、2つの絶縁膜界面
9のトップに注入される電荷量を変えることによってし
きい値を変化させることができる。As is well known, in the floating gate structure GFET shown in FIG. 3, the threshold value can be continuously changed by changing the amount of charge injected into the floating gate 8. In the two-layer insulating film system IG11'ET shown in FIG. 4, the threshold value can be changed by changing the amount of charge injected into the top of the interface 9 between the two insulating films.
(1)式で示したのと同様に、第2図の定電圧出力VC
OnStは、しきい値可変な工G’FKT6のに値に/
D及びしきい値V’TDと、エンハンスメント彫工GI
l″BT20に値KJ 及びしきい値VTFIによって
、
vconet = VTI −J K’D/9
V”rD −・−・−(2)と表わさ
れる。従って、v′TD を変えることに工って、V
constを、集積口V製造後、回路実装状態で電気的
に、容易に調整することができる。As shown in equation (1), constant voltage output VC in Fig. 2
OnSt is the value of G'FKT6 with variable threshold value/
D and threshold value V'TD, and enhancement carving GI
l″BT20 with value KJ and threshold VTFI, vconet = VTI −J K'D/9
It is expressed as V”rD −・−・−(2). Therefore, by changing v′TD, V
const can be easily adjusted electrically in a circuit mounted state after manufacturing the integration port V.
第5図は、シ負い値制御が可能な工GFFliT10を
使った例、第6図は、シキい値制御が可能な工GFKT
6と10を使った例である。第7図は、端子5と電源の
プラス側VDD 3との間で定電圧出力が得られるよう
にした回路構成例で、工GFI!iT1がエンハンスメ
ント形、工GFKT6がしきい値制御が可能なデプレッ
ション彫工GE’ETである。第7図の場合も、第2図
、第5図、第6図で示したように、2つの工GFET1
と6のいすわか、又は両方をしきい値制御が可能な工G
FETとすることができる。第8図は、エンハンスメン
ト彫工GFBT2と10による回路例である。第9図は
、l5chエンハンスメント形工GFKT 11とnc
hデプレッション形工彫工FltT6による回路例、第
10回は、4つの工GFFiT2a、2b、11.12
による構成例である。第10図の場合は、工GFF:T
11.12のいずれ 5 −
か、又は両方をしきい値制御が可能なIGFETとする
ことで出力を可変できる。Figure 5 shows an example of using a mechanical GFFliT10 that can control negative values, and Figure 6 shows an example that uses a mechanical GFFliT10 that can control negative values.
This is an example using 6 and 10. Figure 7 shows an example of a circuit configuration in which a constant voltage output is obtained between the terminal 5 and the positive side VDD 3 of the power supply. iT1 is an enhancement type, and GFKT6 is a depression engraving GE'ET capable of threshold control. In the case of Fig. 7, as shown in Figs. 2, 5, and 6, two
and 6 Isuwaka, or both can be controlled by threshold value.
It can be an FET. FIG. 8 is an example of a circuit using enhancement carving GFBTs 2 and 10. Figure 9 shows l5ch enhancement molding GFKT 11 and nc
Circuit examples using h depression molding carving FltT6, the 10th article includes four types of circuits GFFiT2a, 2b, 11.12
This is an example of the configuration. In the case of Figure 10, the engineering GFF: T
By using either or both of 11.12 as an IGFET capable of threshold control, the output can be varied.
以上のように本発明によりば、工GFETにより構成さ
れる集積回路において、定電圧回路の1つ又は複数の工
GFKTを、シキい値が制御できる工うに、浮遊ゲート
下GFETとすることによって、以前には集積口跡を製
造した時点で決ってし着っていた定電圧回路の出力を、
製造後、回路実装状態でも電気的に、容易に変化させる
ことが可能である。As described above, according to the present invention, in an integrated circuit constituted by GFETs, one or more GFKTs in the constant voltage circuit are configured as floating gate GFETs in order to enable precise control of the value. In the past, the output of the constant voltage circuit, which was fixed at the time of manufacturing the accumulation port,
After manufacturing, electrical changes can be easily made even in the circuit mounted state.
【図面の簡単な説明】
第1図は従来の定電圧回路図、第2図は、本発明による
定電圧回路図、第3図は、本発明の要旨とするしきい値
可変のための浮遊ゲート構造IGFBT(この場合はM
O8構造)の断面構造図、第4図もやはりしきい値を可
変とするための2層絶縁膜系工GFET(この場合はM
NO8#造)の断面構造図、第5図〜第9図はそれぞれ
、本発明の2つの工G′F″BTによる定電圧回路図第
一 6 =
10図は、本発明の4つの工GFKTによる定電圧回路
である。
1・・・・・・デ′プレッション? nch 工GFF
iT2・・・・・・エンハンスメン) ff、 nch
工GFET6・・・・・・電源のプラス側端子VDD
4・・・・・・電源のマイナス側端子V8B5・・・・
・・出力端子
6・・・・・・しきい値可変ftrrQh 工GFET
(デプレッション形)
7・・・・・・浮遊ゲート寸たは2層絶縁膜界面8・・
・・・・浮遊ゲート
9・・・・・・2層絶縁膜界面
10・・・・・・シキい値可変frnch工GFET
(エンハンスメント形)
11・・・・・・エンハンスメント形pch工GNET
12・・・・・・しきい値可変なpch 工GFET以
上
7−
第1図
第3図
第4図
−
一一一一一一一一一一盈−一[Brief Description of the Drawings] Fig. 1 is a conventional constant voltage circuit diagram, Fig. 2 is a constant voltage circuit diagram according to the present invention, and Fig. 3 is a floating voltage circuit diagram for varying the threshold value, which is the gist of the present invention. Gate structure IGFBT (in this case M
Figure 4 also shows a cross-sectional structure diagram of a two-layer insulating film type GFET (in this case, an M
Figure 5 to Figure 9 are the cross-sectional structural diagrams of the GFKT of the present invention (No. It is a constant voltage circuit based on 1...Depression?nch GFF
iT2...Enhancement) ff, nch
GFET6・・・・・・Positive side terminal of power supply VDD
4... Negative side terminal of power supply V8B5...
...Output terminal 6...Variable threshold value ftrrQh GFET
(Depression type) 7... Floating gate dimensions or two-layer insulation film interface 8...
... Floating gate 9 ... Two-layer insulating film interface 10 ... Highly variable frnch engineering GFET
(Enhancement type) 11...Enhancement type pch engineering GNET
12... More than pch GFET with variable threshold value 7- Figure 1 Figure 3 Figure 4- 111111111Ei-1
Claims (3)
集積回路において、少(とも2つの絶縁ゲート電界効果
トランジスタによって構成される定電圧回路の前記絶縁
ゲート電界効果トランジスタの少くとも1つを、しきい
値が可変である電界効果トランジスタとしたことを特徴
とする出カ可変々定電圧回路、(1) In an integrated circuit composed of insulated gate field effect transistors, at least one of the insulated gate field effect transistors of a constant voltage circuit composed of at least two insulated gate field effect transistors is A variable output constant voltage circuit characterized by using a field effect transistor whose output is variable;
遊ゲーIE造雷、界効果トランジスタであることを特徴
とする特許請求の範囲第1項記載の出力可変々定電圧回
路、(2) A variable output constant voltage circuit according to claim 1, wherein the field effect transistor whose threshold value is variable is a floating game IE lightning field effect transistor;
層絶縁膜系電界効果トランジスタであることを特徴とす
る特許請求の範囲第1項記載の出方可変た定電圧回路。(3) Two field-effect transistors with variable thresholds
2. A constant voltage circuit with a variable output voltage according to claim 1, which is a field effect transistor based on a layered insulating film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17486882A JPS5968027A (en) | 1982-10-05 | 1982-10-05 | Variable output constant voltage circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17486882A JPS5968027A (en) | 1982-10-05 | 1982-10-05 | Variable output constant voltage circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5968027A true JPS5968027A (en) | 1984-04-17 |
Family
ID=15986056
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17486882A Pending JPS5968027A (en) | 1982-10-05 | 1982-10-05 | Variable output constant voltage circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5968027A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0290307A (en) * | 1988-09-28 | 1990-03-29 | Nec Corp | Programmable reference voltage generator |
US6077720A (en) * | 1997-12-27 | 2000-06-20 | Agilent Technologies | Method for fabricating semiconductor laser facets using combined cleave and polish technique |
JP2008129717A (en) * | 2006-11-17 | 2008-06-05 | New Japan Radio Co Ltd | Reference voltage circuit |
CN104181971A (en) * | 2013-05-24 | 2014-12-03 | 比亚迪股份有限公司 | Reference voltage source |
WO2015072522A1 (en) * | 2013-11-15 | 2015-05-21 | 旭化成エレクトロニクス株式会社 | Voltage detector, method for setting baseline voltage, and program |
JP2016033961A (en) * | 2014-07-31 | 2016-03-10 | セイコーインスツル株式会社 | Semiconductor integrated circuit device and output voltage regulation method thereof |
-
1982
- 1982-10-05 JP JP17486882A patent/JPS5968027A/en active Pending
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0290307A (en) * | 1988-09-28 | 1990-03-29 | Nec Corp | Programmable reference voltage generator |
US6077720A (en) * | 1997-12-27 | 2000-06-20 | Agilent Technologies | Method for fabricating semiconductor laser facets using combined cleave and polish technique |
JP2008129717A (en) * | 2006-11-17 | 2008-06-05 | New Japan Radio Co Ltd | Reference voltage circuit |
CN104181971A (en) * | 2013-05-24 | 2014-12-03 | 比亚迪股份有限公司 | Reference voltage source |
CN104181971B (en) * | 2013-05-24 | 2015-11-25 | 比亚迪股份有限公司 | A kind of reference voltage source |
WO2015072522A1 (en) * | 2013-11-15 | 2015-05-21 | 旭化成エレクトロニクス株式会社 | Voltage detector, method for setting baseline voltage, and program |
JPWO2015072522A1 (en) * | 2013-11-15 | 2017-03-16 | 旭化成エレクトロニクス株式会社 | Voltage detector, reference voltage setting method, and program |
US9666287B2 (en) | 2013-11-15 | 2017-05-30 | Asahi Kasei Microdevices Corporation | Voltage detector, method for setting reference voltage and computer readable medium |
JP2016033961A (en) * | 2014-07-31 | 2016-03-10 | セイコーインスツル株式会社 | Semiconductor integrated circuit device and output voltage regulation method thereof |
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