JPS5965443A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To input an evaluation signal of desired level to the desired node of the main circuit by providing the main circuit and a flip-flop on one substrate and by selectively irradiating the P-N junction of transistor for driver of flip-flop with a beam. CONSTITUTION:A flip-flop 20 is combined as a redundancy circuit to a semiconductor integrated circuit using a static shift register 100 as the main circuit, these are integrated on the same semiconductor substrate and wiring is carried out so that an output of the flip-flop 20 is supplied to the node of shift register 100. When the P-N junction between the drain and substrate of transistor 21b is irradiated with a laser beam, even if an MOS transistor 21b is OFF, a junction current flows, a connecting point 24 is set to a low level, a driver transitor 22b of inverter 22 is OFF, and an output point of 23 of flip-flop 20 becomes high level. When the P-N junction of transistor 22b is irradiated with the beam, an output becomes low level.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to semiconductor integrated circuits, and particularly to the configuration of so-called redundant circuits for circuit evaluation.

[Technical background of the invention]

In order to evaluate the characteristics of a semiconductor integrated circuit or to perform precise failure diagnosis, an appropriate part of the circuit (hereinafter referred to as

Let it be a node. ) requires inputting an electrical signal from the outside. In order to speed up and facilitate this evaluation or diagnosis, various types of integrated circuits are known in which a circuit for inputting evaluation signals, a so-called redundant circuit, is built into a semiconductor substrate along with a main circuit.

For example, a circuit diagnosis method as shown in FIG. 1 using an equinodal circuit is conventionally known. This method uses two MOS connected in series.
) In the inverter JO ratio consisting of transistors 11 and 12, a laser beam 19 is irradiated onto the PN junction 13 between the drain substrate of the driver transistor 12.

According to this method, the PN junction 13 is irradiated with a laser beam and the output terminal 150 level, which is at high level "1", is changed to low level "0++" depending on the level of the input signal 14. It is something to do.

[Problems with back qt technique and physical training]

This kind of circuit 1￥〉Ten 1 method can raise the concentration +, b'(, 1) in the Iff product circuit (compared to the case where ξrad is provided for this test probe). It is possible and desirable.

However, the level can only be changed from high level to low level, and the level cannot be changed. By giving a signal of
There wasn't.

[Purpose of invention ()] This C゛) 1 book (above, J', 1.
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f- [Looking at the input to Kamogawa-4-It happened with C.
Semiconductor JTI that requires T10 redundant circuits for % centralization
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In order to achieve this purpose, the present invention provides a main circuit having a predetermined electrical function, and the output of the first inverter is connected to the input of the second inverter. A flip-flop in which the output of the second inverter becomes the input of the first inverter, and means for transmitting the output of the first inverter of this flip-flop to the main circuit are integrated into one semiconductor. a PN provided on the substrate and constituting a dry J transistor in the first inverter or the second inverter;
i (((The beam is selectively irradiated to
I will publish the quality of f'r's operation.

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Embodiment 1 of the present invention will be described below with reference to the accompanying drawings.

Figure 2 shows a practical example of this invention.
From the transistors 111\113, 121 to 123, etc.
This figure shows a circuit configuration in which a flip-flop λ) is combined with a main semiconductor integrated circuit as a redundant circuit.

According to the figure, the flip-flop 2o is a first inverter in which transistors 21a and 21b are connected in series.
The second inverter 22 includes a meta 2J and transistors 22a and 22b connected in series. The drains and gates of the load MOS transistors 21a and 22H are each connected to the power supply V. The gate 1 of the transistor 21b for dry nozzles and the transistor 22a.

This point 23, which is connected to the connection pointer 22b, becomes an output point. Further, the gate of the driver transistor 22b is connected to a connecting point between the transistors 21a and 21b. The sources of each driver transistor 21b and 22b are commonly connected to a power supply V.

S Based on the above, the output of the first innovator 21 is the output of the second
is the inverter 220 input and the second inverter 2
According to the invention, such a flip-flop '21) whose output is the input of the first inverter 21 is integrated on a semicircular substrate together with the shift register 100, and the output of the first inverter 21 is integrated as described below. 21 or the second Inno-Nou-Yu 2
Dry nose transistors 21b and 22 in 2
A beam, for example, an original beam, is selectively irradiated onto the PN junction formed between the drain substrate of b.

Here, according to the same figure, the output point 2 of the flip-flop addition
2 is connected to a node ND related to the transistor 112 of the shift register 100. However, the transistors 111 to rows 3 and 121 constituting the shift register 100
Connect the output of the 7 lip-flops to any one node related to any one of 123. It goes without saying that a plurality of flip-flops may be prepared and the outputs of each of the 7 and 70 flip-flops may be connected to any number of nodes.

Note that the shift register 100 receives an input signal Si through the transistor 130'Y, and inputs the input signal Si through the transistors 111 to 1.
13, 121 to 123 are connected to a clock signal φ8. φ8′,
φb.

By driving with φb', an output signal S is output from the output terminal 140. This is what you get.

Next, the operation of this embodiment will be explained.

According to this invention, as shown in FIG.
Wire it so that it is supplied to the 0 node. Thereafter, the original beam, for example, 1/-zabeam, is selectively irradiated onto the PN junction formed between the drain and substrate of the driver transistors 21b and 22b in the first inverter 21 or the second inverter 22. Make it 5.

If the PN junction between the drain and the substrate of the transistor 21b is irradiated with a laser beam, even if the MOS transistor 211) is in the off state, a junction current flows between the drain and the substrate due to the 9 beam irradiation, and the transistor The connection point between 21a and 21b becomes low level "0". As a result, the driver transistor 22b of the inverter 22 is turned off, and the transistors 22a,
The connection point of 221) and therefore the output point of the IJ block flop output high level "1".

Conversely, when a laser beam is irradiated to the PN junction between the F-ray 7 and IHH of the transistor 22b of the transistor 22b, even if the transistor 22b is in the off state, it will flip due to the junction current between the drain and the substrate. The output of 70 Tsubu 20 is low level ``'O'' tonal.

Therefore, by selecting the beam irradiation position from an external beam generation source, the output of the flip-flop can be set to any level, and an evaluation signal of any level can be supplied to a predetermined node in the main circuit. can.

FIG. 3 shows another embodiment of the invention, in which the flip-flop I has a CMOS configuration.

According to the same figure, load P-channel MO8) transistor 3
1a and driver N-channel MO8) transistor 31
a first inverter 31 consisting of a first inverter 31 consisting of a load P-channel MO8) transistor 32a and a driver N-channel M
A second inverter 32 consisting of an OS transistor 32b
The flip 70 and the knob 30 are constructed from the above. Here, the gates of each transistor 31a, 31b are commonly connected at a connection point 33, and each transistor 32a,
The gates of 32b are commonly connected at a connection point 34. The commonly connected gates are mutually connected to the cascade connection points 35, 36 of other inverters. That is, the output of the first inverter 31 becomes the input of the second inverter 32, and the output of the second inverter 32 becomes the input of the first inverter 310. Further, the connection point 36 is the output terminal T of the flip-flop.

It is.

In each of the above embodiments, the same operation as described above can be achieved by selectively irradiating the PN junction of the transistor 31b or 32b with a laser beam even in the case of a fritzo having a configuration like C. Since a redundant circuit can be incorporated as a MOS integrated circuit without providing a Nomurad for an evaluation probe, the degree of integration of a board having a main circuit can be increased.

It goes without saying that the channel type of the MOS transistor may be reversed in each case.

For example, the selective irradiation of the laser beam explained above
This can be realized with the stocks shown in the figure.

That is, the semiconductor integrated circuit 41 to be evaluated is set on the installation stand 42 having a socket, and the signal source 43 also applies a predetermined power supply voltage and signal. Semiconductor integrated circuit 41
The device is based on the invention by Jin, and includes, for example, a seven lip-flop constructed as shown in FIG.

For such a circuit 41, the lens system 451 reflects t,! ,
A laser beam A is irradiated from the laser light source 44 via the n 3F and the lens system 37. At this time, it is easy to check the circuit 41 for the spora (P) of the laser beam A through another optical lens system (not shown), and from the leak of the gated circuit 41, the beam can be detected as described above. Since the location to be irradiated with heat is known, it is easy to irradiate a predetermined location with a laser beam. Of course, marks may be provided in advance at locations on the circuit to be irradiated.

In this way, the circuit 41 can be evaluated by the output signal B obtained via the installation stand 42 when the beam is irradiated.

〔Effect of the invention〕

The present invention provides a semiconductor integrated circuit having a redundant circuit in which an evaluation signal of any level can be input to any node of a main circuit and a high beam fλ can be achieved by configuring one or more of the above. be able to.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing a conventional circuit diagnosis method, Fig. 2 is a configuration diagram of an embodiment of the present invention, Fig. 3 is a circuit diagram of another embodiment of the invention, and Fig. 4 is an embodiment of the invention. FIG. 2 is an explanatory diagram showing how a semiconductor integrated circuit is evaluated. 100...Main circuit, addition, 30...Flip 70 knobs. 21, 31...first innovator%22, 32
...second inverter, 21a, 22a,
31a, 32a...-Load transistor, 21
b, 22b, 31b, 32b... transistors for dry knobs.

Claims (1)

[Claims] 1. A main circuit having a predetermined electrical function, the output of the first input becoming the input of the second input, and the output of the second input is provided as an input of the first inverter, and a means for transmitting the output of the first inverter of the flip-flop to the main circuit is provided on one semiconductor substrate, and the first inverter or A semiconductor integrated circuit configured to selectively irradiate a beam onto a PN junction constituting a driver transistor in a second inverter to determine whether the operation of the main circuit is good or bad. 2. In the circuit according to claim 1. The semiconductor integrated circuit is characterized in that the driver transistor and star are MO$transistors, and the PN junction is formed between the drain of the MOS transistor and the semiconductor substrate.