JPS5965334A - Input and output control system - Google Patents

Abstract

PURPOSE:To prevent an input/output device from being occupied by a high- speed system when said input/output system is shared by a system considerably different in performance among high-order processors, by providing such as a means to each bus to respond and store that the input/output controller is busy. CONSTITUTION:A means is provided to each bus to answer and store that an input/output controller is busy. For instance, if an input/output request is set from a bus A via a driver/receiver 5, an operation is started by a sequence control circuit 7 as long as no suppression signal is sent from a common control circuit 15. Then the suppression signal is transmitted to sequence circuits 7 and 8. If an input/output request is given from a bus B under such conditions, this request is transmitted to the circuit 8 via a driver/receiver 6. However the circuit 8 answers a busy state since the suppression signal is received and at the same time sets the fact that it responded to a busy state display register 10. Then an end signal is sent to the circuit 7 when the processing is finished by the input/output request fed from the bus A.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to an input/output control system that prevents services from being concentrated on one path in an input/output control device that is shared by a plurality of paths.

<Technical Background> In general, in input/output control systems, higher-level processing units often share input/output devices under an input/output control device.

However, this sharing is done by different paths.

<Prior art and problems> In the conventional input/output control device with multipath, all activations other than the path that responded that the device is in use could be received.

For this reason, when shared between systems with different input/output request time intervals, the service is biased towards the faster system.

When the method of making the receptionist wait for a long time was adopted, there was a drawback that other input/output processing could not be performed on that path, resulting in poor usage efficiency.

<Objective of the invention> An object of the invention is to provide a new input/output control method that eliminates the above-mentioned drawbacks.

<Structure of the Invention> The present invention is an input/output control method used by a plurality of paths in order to achieve the above object, in which each path responds that the input/output control device is in use. and a storage means for storing a response indicating that the path is in use, and when input/output processing by one of the paths is completed, the fact that a response indicating that the path is in use is stored is stored in the storage means for a path other than the path. If the path is in use for a certain period of time.

<Embodiments of the invention> FIG. 1 shows an example of the configuration of a system according to the present invention.

In the figure, 1 and 2 indicate a host processing device, 3 an input/output control device, and 4 an input/output device, respectively.

Those under the input/output control device 3 are the upper processing devices 1 and 2.
Therefore, it is shared by path A and bus B.

The input/output control device 3 accepts input/output requests from the higher-level processing devices 1 and 2, whichever comes first,
Responds as busy to subsequent I/O requests.

In such a system configuration, one embodiment of the input/output control method of the present invention will be described with reference to FIG.

In the figure, 5 and 6 are drivers/receivers, 7.8 is a sequence circuit, 9.10 is an in-use display register, and 11.
12 is an inhibition signal register, 1.3.14 is an OR gate,
15 indicates a common control circuit.

Sequence circuits 7 and 8 accept input/output requests from the system when the common control circuit 15 does not receive an inhibit signal, execute a selection sequence, and execute an end sequence in response to an end signal.

When the inhibit signal is on, the IDC in use sequence is executed to indicate that the IDC is in use in response to input/output requests from the system.

Next, the operation will be explained.

First, when an input/output request is set from path A via the driver/receiver 5, the sequence circuit accepts activation on the condition that the inhibition signal from the common control circuit 15 is not raised, and Accordingly, predetermined processing 1 is performed with the input/output device of the distribution.

The common control circuit 15 transmits an inhibition signal to the sequence circuits 7 and 8 upon activation reception (=J digit).

In this state, for example, if there is an input/output request from path B, it will be transmitted to the sequence circuit 8 via the driver/receiver 6, but since the inhibition signal is rising in the sequence circuit 8,
It responds to this path B that it is in use, and also sets the in-use display register 10ζ to indicate that it is in use.

Thereafter, when the processing for the input/output request from path A is completed, a termination signal is issued from the common control circuit 15 to the sequence circuit 7, and the inhibition signal register 11 is set on the condition that the in-use display register 10 is set.

Further, the inhibition signal directly issued from the common control circuit 15 is dropped.

In this state, the inhibit signal is continued by the output of the register 11 for the path A that has accepted and processed the input/output request, even though the processing has been completed.

Thereafter, a release signal issued from the common control circuit 15 after a certain period of time causes the register 11 to be reset and the inhibit signal to be dropped.

The previously set register 10 is reset when it receives an input/output command from each bus B and issues a start-up command to the common control circuit 15.

With this configuration, after the path that received the input/output request is terminated, if there is a path that responds to another path as being in use, the system will prevent input/output requests from being accepted for a certain period of time. This allows each bus to be served evenly.

<Effects of the Invention> As described above, according to the present invention, when input/output devices are shared between systems whose higher-level processing units have widely different performances, the input/output device is not monopolized by a high-speed system.

[Brief explanation of the drawing]

FIG. 1 shows a configuration example of a system according to the present invention, and FIG. 2 shows an input/output control method according to the present invention. In the figure, 1 and 2 are upper processing units, 3 is an input/output control device fη, and 4 is an input/output control system. Output device, 5 and 6 are Dryno receivers, 7 and 8 are sequence circuits, 9 and 10 are in-use display registers, 11,
12 is an inhibition signal register, 13.14 is an OR gate, 1
5 indicates a common control circuit, respectively.

Claims (1)

[Claims] An input/output control method used by a plurality of paths, which includes a storage means for each path to respond that the input/output control device is in use and to store the response. When input/output processing by any of the paths is completed, if the storage means stores that a path other than the path has responded that the path is in use, the path is set to be in use for a certain period of time. Characteristic input/output control method.