JPS5961060A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To reduce the area of a crossover and the resistance value of the lower layer wiring thereof by a method wherein an N type diffused layer is provided on a P type substrate, and the base of a P-N-P transistor is provided at one end thereof, and the collector of an N-P-N transistor at the other end. CONSTITUTION:The N type diffused layer 20, as the layer wiring of the crossover 22, is provided on the P type substrate 1. An N type diffused layer 13 and an N type epitaxial layer 5 serving as the base of the P-N-P transistor 21 are provided at one end thereof, and an N type diffused layer 15 and an N type epitaxial layer 7 serving as the collector of the N-P-N transistor 23 at the other end. At this time, the N type diffused layers 13 and 15 are formed by a process after that for the N type diffused layer 20. Then, since an isolation wall 8 disappears between the crossover 22 and the transistors 21, 23, the area becomes small. Besides, the N type diffused layer 20 can be reduced in layer resistance; therefore the resistance value of the lower layer wiring can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a bipolar semiconductor integrated circuit in which circuit conductive elements including PNP transistors, NPN transistors, etc. are formed on one semiconductor substrate, and in particular
P) This relates to improvement of the crossover interposed in the connection between the base of the transistor and the collector of the NPN transistor.

Generally, in bipolar integrated circuits, mainly NP
Although N-type transistors are often used, it may be advantageous to combine PNP transistors in circuit configurations such as in constant current power supply circuits. Fig. 1 shows an example of a conventional bipolar integrated circuit of this type. In Fig. 1, (
1) is a P-type silicon single crystal substrate (hereinafter referred to as P-type substrate), and (2), (3) and (4) are P-type groups [(
1) N+ buried layer with high N type impurity concentration formed in Jl, (5), (6) and (7) are N type epitaxial m, (8) ViP type separation! , (9).

(10), (11) and (12) are P swelling diffusion layers formed in each epitaxial layer, (13), (1
4>, us) and (1G) are N-type diffusion layers with high N-type impurity concentration formed in each epitaxial layer, (17) is an insulating film such as SiO2 or Si3N4, (18) and (19) is a wiring conductor such as aluminum.

In addition, (21) uses the P expansion diffusion layer (10) as the emitter, the N type diffusion m (13) and the N type epitaxial! (5) and a lateral PNP transistor with the T-buried layer (2) as the base and the P-swelled diffusion layer (9) as the collector, and (22)
is black, :', :A--c, (23) is N swelling diffusion layer (1
6) as an emitter.

Based on P swelling diffusion layer (12), N+ diffusion layer (15) and N
to type epitaxial: f(7) and N+embedded R41(
4) is a vertical N1)N transistor with collector.

In an integrated circuit having such a configuration, when the base of the PNPN transistor 1) and the collectors of the NPi to transistors (23) are connected, a wiring conductor (19) is present between the bases and collectors of these transistors. Surface Jν
P swelling diffusion layer (11) when connection via wiring pot body is possible.
A crossover (22) is formed in which the P-type diffusion /d (11) is used as a lower layer wiring and the assigned conductor (19) is used as an upper layer wiring. In addition, in the N expansion 8 layer (14,) and the N''uT!-containing layer (3), the Ti position of the N type epitaxial layer (6) is always higher than the potential of the isolated type (8) and the P expansion diffusion layer (11). It is made to be biased.

However, in such conventional bipolar integrated circuits,
P-type diffusion 15 (
ll) is formed in the same process as each P swelling diffusion layer of the horizontal PNPN transistor 1) and the vertical NPN transistor (23), so its layer resistance value is 60~
It is relatively large at 300Ω/[・, and the crossover (2
2] If the resistance of several tens of ohms cannot be ignored in the lower layer wiring, it cannot be used, υ, and the crossover f, 22)'
Since the JT PNP transistor (21) and the N1 transistor (23) must be surrounded by another separation wall (8), there is a drawback that extra space is required.

The present invention has been made in order to solve the above-mentioned drawbacks of the conventional art. It is an object of the present invention to provide a bipolar integrated circuit which has a reduced area and a reduced resistance value of the underlying wiring.

In order to achieve such an object, the present invention provides an N-swelled diffusion layer that forms a lower wiring of a crossover on a semiconductor substrate, and processes subsequent to the N-swelled diffusion layer at both ends of this N-swelled diffusion layer. A PNP transistor is formed using one of these N-swelled diffusion layers as a base, and an NPN) transistor is provided with the other as a collector, and each of the crossovers and the PNP) transistor are provided. ”? and NPN transistors are formed within two closed thermal walls.

Hereinafter, an example of this expression will be explained based on 1.

FIG. 2 is a cross-sectional view of a bipolar type east-private circuit according to a first embodiment of the present invention, and the same reference numerals are given to the same parts as in FIG. 1. The difference in this example from FIG. 1 is that the base of the PNP transistor (21) and the collector f of the NPN transistor (23) are: A 7-inch N-swelling diffusion layer (20) is formed, and the N-swelling diffusion layer (20) is formed at both ends of this N-swelling diffusion layer (20).
20) and PNP transistors (21
) is the base of the N-swelling diffusion layer (13) and NPN ).
N expansion diffusion layer (15) which becomes the collector of transistor (23)
), and these crossovers (22) and PNP
) transistor (21) and NPN) transistor (23)
) is intended to be formed within one closed P-shaped separation wall (8). In this case, the N-type diffusion 1j4 (20), which is the lower wiring of the crossover (22), is connected to the P-type light 477 (
1) E-diffusion is selectively performed on the N-type epitaxial layer formed on the top to form a P-type portion N:# )ζ□2 (8
) k forming process and...? -c))NP) transistor (21) and NPN transistor <, 23. + Nor-type diffusion, 19) is formed in a relatively deep N-type diffusion 19) with the process of forming 9), flo) and (12), and its layer resistance is rl/・
] It is easy to reduce the layer resistance of the lower wiring of the crossover (22). Note that the N-swelled diffusion layer 1.20)
! -1 that N+ is connected to the buried layer (3), and this N
+ Push-in layer (3) (・-t: PNP ) transistor (2
1)], (Anti-resistance NPN) U:/ resistor (23) is connected to the 7-layer N″fiIHfiIH layer (4) which lowers the collector resistance of the resistor (23), respectively. Thus, according to the above embodiment, the crossover (22
) is formed in the lower interconnection layer with a high impurity concentration of 4, and a PN diffusion layer (20) is formed at both ends of this N expansion diffusion layer (20).
P) N-type diffusion ff that becomes the base of transistor (21)
i (13) and the N-swelled diffusion layer (15), which becomes the collector of the NPN transistor (23), are directly connected to form a conductor (18) that connects the base and collector of both transistors as in the conventional case. This eliminates the need for wiring. Further, the N-swelled diffusion layer (20) has a crossover (22
), as well as the base of the PNP transistor (21) and the base of the NPN) transistor (23).
It acts as a collector of the PNP transistor (21) and the NPN transistor (21).
23) collector resistance becomes smaller.

Moreover, since there is no conventional separation wall (8) between these crossovers (22), PNP transistors (21), and NPN) transistors (Z3), the PNP transistors (21) and NPN) transistors (23) The combined area of the cross-over (22) and the cross-over (22) becomes very small. Furthermore, the diffusion process of the N-swelled diffusion layer (20) is a process prior to the diffusion process of the P-type diffusion Fl (9), (10) and (12) forming both transistors (21), (23). Since the N-type diffusion/1(2
The insulating film (17) between the N-type epitaxial layer (5) and the wiring conductor (19) is thicker than the conventional insulating film between the P expansion diffusion layer (11) and the wiring conductor (19). ), (7
) on the insulating film (17) becomes smaller. Therefore, it is possible to prevent the wiring conductor (19) from being cut at the stepped portion of y'A, b'A (17), and therefore, when a high surge tυ pressure is applied to this conductor, It also has the advantage that the insulating film is less likely to be damaged.

In the above embodiment, a PNP l-transistor (21
The case where a lateral PNP and a transistor are used is shown in ), but a substrate PNP as shown in figure J3)? A similar effect can be obtained by using a /register or by using other PNP transistors of the same type.

However, the same effect can be obtained by using other NPN transistors in place of the vertical NPN transistor (23).

As explained above, according to the present invention, an N-swelling diffusion layer is formed on a semiconductor substrate to be diffused in a step subsequent to the N-swelling diffusion layer to be formed under the crossover/i-arrangement+af: A PNP) transistor is provided as a pace, and an NPN is used as a collector.) A transistor is provided, and these crossover and PNP) transistors and an NPN) transistor are formed in one closed molecule; It is possible to reduce the layer resistance of the lower layer wiring of the crossover.In addition, since there is no molecule lt''+ between the crossover (and PNP) transistor and the NPN) transistor, the overall area can be reduced. The base resistance of the PNP transistor and the collector resistance of the IN transistor become smaller, the thickness of the crossover edge becomes thicker, and the difference in thickness between the N-type epitaxial E and the upper insulating film becomes smaller.
The step difference in the insulating film is small, and the UJ4 distribution body does not break at this step, and the insulating film is less likely to be damaged even when a surge voltage is applied to the wiring conductor, resulting in improved characteristics and reliability. Extremely effective.

[Brief explanation of the drawing]

Figure 1 shows a structural cross-section CI'i of a conventional bipolar condensation circuit.
Figures J and 2 are tl'f cross-sectional views of the Ibora shape collection Dj' circuit according to one embodiment of the present invention, and Figure 3 is a structural cross-sectional view of another embodiment of the present invention. (1 )...P-type silicon single crystal substrate, (2) ,
(3), (4)...N+buried layer, (5), (
7)... N-type epitaxial layer, (8)... Inner valve f wall, (9) , Qo), . (12)...bow) swelling diffusion layer, (13)...PNP
N expansion diffusion layer, which is the pace of the transistor (1 me...
・NPN) N-type spreading layer that becomes the collector of the transistor,
(18) , (1,9) ・yaφ・wiring conductor, (2
0)・ψ...To the N-type expansion J that forms the lower layer wiring of the crossover (21 units...ph+p) transistor, (2
2)...Crossover, (23)...NPN
) Langista. Agent Makoto Kuzuno

Claims (1)

[Claims] An N-type diffusion layer that forms the lower wiring of the crossover is provided on the semiconductor substrate, and the N-type diffusion layer is provided at both ends of this N-type expansion fi'i/layer. A PNP type diffusion layer is formed to provide a PNP transistor based on one of these N type diffusion layers, and an NPN transistor whose collector is the other N type diffusion layer is provided, and each of the above-mentioned Crossover! A semiconductor integrated circuit characterized in that a PNP transistor and an NPN transistor are formed in one closed FIF5.