JPS5956754A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To increase the capacitance of a capacitor formed very small by a method wherein an electrode surface is formed in unevenness form by the irradiation of high energy beams, a dielectric film is formed on this surface, and further a capacitor is formed by adhering an opposed electrode film on the upper surface thereof. CONSTITUTION:A gate insulation film and a gate electrode 12 are provided at a cell region on a P type Si substrate 11 whereon a field insulation film 10 has been formed. Then, after forming an insulation film by implanting As ison and then dividing a source region 13 and a drain region 14, the insulation film on the region 14 is removed. Next, a polycrystalline film 15 is adhered and changed into a conductive film by doping an impurity. The film 15 is fused with a laser ray into an unneven surface. An insulation film 16 is produced, and further a polycrystalline Si film 17 is adhered. Finally, the capacitor is formed by patterning the films 17, 16, and 15 at the same time. This film 16 becomes the dielectric film held between the both electrodes.

Description

Detailed Description of the Invention (IL) 6 Technical Fields of the Invention The present invention (4 semiconductor devices 1 (3 manufacturing methods), particularly a method for forming a capacitor provided in a semiconductor integrated circuit (IC) 4" to the improvement of

(1]) Conventional technique A11 and problems 101.1 Is it an improvement in characteristics such as speed 'Ah creation or erasure 'R1'?
LSIs and VLSIs have been developed, and it is expected that this trend will continue in the future and that the debt collection rate will continue to increase.

In such an IC, there are other transistor elements inside the IC, as well as resistors, capacitors, etc.
An Il element is provided, and it is composed of (1 is a dynamic Jt of 4 f from a 1-element type memory cell, an AM type semiconductor memory device is one MO8 transistor):, 3 pins, 2 and one capacitor. ing. ':n 1.1.2J
Figure 43 shows a top view of a cell structure called a stack (5 stack) type of one-element memory cell with +, IC2, L, 1 is a transistor, 2 is a x) bazota,
It is known as a structure that can increase the capacitance (1 capacitance).

However, as described in J1, as the I island density and integration become higher and the individual memory cells become smaller, the capacitance of the storage area also becomes minute, and the capacitance becomes G( The decrease in hastance is not a good thing, but it lowers the reliability by causing false IQ11 works, etc.
This may cause it to swell.

<a> Aspects of the Invention) The present invention proposes a method for forming a capacitor that increases the capacitance C of the capacitor by this fine miniaturization.

(+l) The object of the invention is to irradiate the electrode surface with high-energy heat 1. to make the surface uneven, to form a dielectric film on the uneven surface, and to form a dielectric film on the uneven surface. This is achieved by a manufacturing method in which a capacitor is formed by depositing a cathode film (opposed to the upper surface).

(e) Embodiment of the invention Hereinafter, one embodiment will be explained in detail. 2 to 6 show sequential diagrams of the manufacturing process according to the present invention, and the present embodiment is a process of forming a capacitor of a stack type one-element type memory cell. 7. As shown in Figure 2. Yield insulation film 10
A gate insulating film and a goo1-electrode 12 are provided in the cell region on the P-type silicon substrate 11 formed with 1, and arsenic (As'+) ions are implanted by the cell 7 alignment method to form the source region 18 and drain region 14. After defining and forming an insulating film made of silicon dioxide (5t(-)2) on the surface,
The 8i (Jg film) on the drain region 14 is removed.Then, as shown in FIG.
(A polycrystalline silicon film 15 of about 100 layers is deposited and doped with impurities to make it a conductive film.

Next, as shown in FIG. 4, the surface of the polycrystalline silicon film 15 is scanned with a laser beam to melt it and give it a rough surface shape. For example, the laser beam is CW (
Continuous) type YA, 01/- laser is irradiated at an output of 2 W and a scan speed of 10 ('Flj, /%), which is enough to form extremely uneven surfaces on the surface.

Then, as shown in FIG.
It is oxidized for about 10 minutes at a high temperature of 0.00°C, resulting in a film thickness of 8°C.
A polycrystalline silicon film 17 having a thickness of 4,000 wafers is deposited thereon. Next, as shown in FIG. 6, the polycrystalline silicon film 7,[1(i(12) film 16 and the polycrystalline silicon film 15 are simultaneously patterned to form a capacitor. *16 is a dielectric film sandwiched between both electrodes.

By forming the dielectric film as described above, a dielectric film having many irregularities is formed, and its surface area can be increased to 180 to 170 times that of a flat surface area. Do it like this.

After forming the catalyst, high temperature oxidation or gas phase J
+1J% B-Yotsu(1' 1(io) A normal edge film like a film is formed on the surface and is attached to the electrode wiring (human wire) in the source region. The cell is completed.

The d-tube body membrane of the above 1 nol is S i (1, l11°416
Then, the surface of the polycrystalline silicon nitride film 15 with an uneven shape of lb humidity and temperature was thermally nitrided in an annealing gas. It is also possible to form a dielectric film and combine it with a dielectric film.

Also, although the above method involves scanning the entire surface with 17-point laser light, it is also possible to place a metal 7-metal mask and form irregularities on only 1/111th the surface of the capacitor. eye.

One, does Rayleigh's light output and scanning speed depend on the electrode material? !
■Depending on / OK, the first row is silicon nor board Yuj is -
It is necessary to scan with JF4 + white 1 output.

(1) Effects of the Invention] As can be seen from the explanation, the present invention avoids increasing Kihe Vashitan:/,C without adding Iol to j(tsu). This will greatly contribute to improving the quality of half-and-half storage devices.

[Brief explanation of the drawing]

FIG. 101 is a cross-sectional view of the structure of a multi-reel to which the present invention is applied, and FIGS. 2 to 6124 are sequential views of manufacturing steps of an embodiment of the present invention. In the figure, 1 is an M, US transistor, 2 is a capacitor, 11 is a silicon substrate, 12 is a gate '1-4' as a pole, [4 is a train region, 15 is a polycrystalline silicon film (Keito Hunter tun electrode film), 16 is a 17 indicates a polycrystalline silicon film (capacitor rlJ Iu IN ) on the top surface. 1st closed figure 2nd figure 1f figure 5

Claims (1)

[Claims] A high-energy beam is irradiated onto the electrode surface to make the flow surface uneven, a dielectric film is formed on the surface, and a counter electrode film is further applied on the upper surface to form a C-V panther. upper phase 1
A method for manufacturing a 91-unit device, characterized by comprising: