JPS57112066A - Laminated capacitive element - Google Patents

Laminated capacitive element

Info

Publication number
JPS57112066A
JPS57112066A JP55187295A JP18729580A JPS57112066A JP S57112066 A JPS57112066 A JP S57112066A JP 55187295 A JP55187295 A JP 55187295A JP 18729580 A JP18729580 A JP 18729580A JP S57112066 A JPS57112066 A JP S57112066A
Authority
JP
Japan
Prior art keywords
layer
capacitive element
electrode
instance
cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55187295A
Other languages
Japanese (ja)
Other versions
JPH0320905B2 (en
Inventor
Yoshimi Shiotani
Michio Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55187295A priority Critical patent/JPS57112066A/en
Publication of JPS57112066A publication Critical patent/JPS57112066A/en
Publication of JPH0320905B2 publication Critical patent/JPH0320905B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To increase stored electric charge in a capacitive element of a MOSRAM cell and make the element smaller by a method wherein three or more conductive layers are formed on a thick selectively oxidized film with insulation layers in between and every other conductive layers are connected together. CONSTITUTION:In the case of, for instance, a n-channel 1 transistor type RAM, three phosphorus doped Si layers 5, 7, 12 are formed and piled with insulation films 6, 11 in between. The layer 5 and the layer 12 are connected together and compose a capacitive element with the layer 7. One electrode, for instance, the layer 7 (or the layer 5), of the capacitive element is connected to a n<+> diffused layer 2 to be used as a charge storing electrode and another electrode, for instance, the layer 5 (or the layer 7), is used as a grounding electrode. With above configuration, if the occupied area is the same as the conventional cell, the charging capacity can be increased and the large read out signal can be obtained, so that the malfunction can be avoided. If the capacity is the same as the conventional cell, the dimensions of the said cell can be decreased.
JP55187295A 1980-12-29 1980-12-29 Laminated capacitive element Granted JPS57112066A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55187295A JPS57112066A (en) 1980-12-29 1980-12-29 Laminated capacitive element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55187295A JPS57112066A (en) 1980-12-29 1980-12-29 Laminated capacitive element

Publications (2)

Publication Number Publication Date
JPS57112066A true JPS57112066A (en) 1982-07-12
JPH0320905B2 JPH0320905B2 (en) 1991-03-20

Family

ID=16203491

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55187295A Granted JPS57112066A (en) 1980-12-29 1980-12-29 Laminated capacitive element

Country Status (1)

Country Link
JP (1) JPS57112066A (en)

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5956754A (en) * 1982-09-24 1984-04-02 Fujitsu Ltd Manufacture of semiconductor device
JPS5961956A (en) * 1982-09-30 1984-04-09 Fujitsu Ltd Dynamic memory
JPS59188963A (en) * 1983-04-12 1984-10-26 Nec Corp Semiconductor device
JPS59231851A (en) * 1983-06-14 1984-12-26 Nippon Telegr & Teleph Corp <Ntt> Semiconductor memory cell
JPS61129863A (en) * 1984-11-28 1986-06-17 Hitachi Ltd Semiconductor device and manufacture thereof
US4685197A (en) * 1986-01-07 1987-08-11 Texas Instruments Incorporated Fabricating a stacked capacitor
US4700457A (en) * 1985-03-29 1987-10-20 Mitsubishi Denki Kabushiki Kaisha Method of making multilayer capacitor memory device
US4735915A (en) * 1983-07-05 1988-04-05 Oki Electric Industry Co., Ltd. Method of manufacturing a semiconductor random access memory element
JPS63133565A (en) * 1986-11-25 1988-06-06 Matsushita Electronics Corp Semiconductor storage device
JPH0294560A (en) * 1988-09-30 1990-04-05 Toshiba Corp Semiconductor storage device and manufacture thereof
JPH02135772A (en) * 1988-11-16 1990-05-24 Mitsubishi Electric Corp Semiconductor device
US5057446A (en) * 1990-08-06 1991-10-15 Texas Instruments Incorporated Method of making an EEPROM with improved capacitive coupling between control gate and floating gate
US5162253A (en) * 1991-04-05 1992-11-10 Nec Corporation Method of producing capacitive element integrated circuit
US6403455B1 (en) 2000-08-31 2002-06-11 Samsung Austin Semiconductor, L.P. Methods of fabricating a memory device
US6617205B1 (en) 1995-11-20 2003-09-09 Hitachi, Ltd. Semiconductor storage device and process for manufacturing the same
US6689668B1 (en) 2000-08-31 2004-02-10 Samsung Austin Semiconductor, L.P. Methods to improve density and uniformity of hemispherical grain silicon layers

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53123687A (en) * 1977-04-04 1978-10-28 Nec Corp Binary memory element
JPS55154762A (en) * 1979-05-22 1980-12-02 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor memory

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53123687A (en) * 1977-04-04 1978-10-28 Nec Corp Binary memory element
JPS55154762A (en) * 1979-05-22 1980-12-02 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor memory

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5956754A (en) * 1982-09-24 1984-04-02 Fujitsu Ltd Manufacture of semiconductor device
JPS5961956A (en) * 1982-09-30 1984-04-09 Fujitsu Ltd Dynamic memory
JPS59188963A (en) * 1983-04-12 1984-10-26 Nec Corp Semiconductor device
JPS59231851A (en) * 1983-06-14 1984-12-26 Nippon Telegr & Teleph Corp <Ntt> Semiconductor memory cell
US4735915A (en) * 1983-07-05 1988-04-05 Oki Electric Industry Co., Ltd. Method of manufacturing a semiconductor random access memory element
JPS61129863A (en) * 1984-11-28 1986-06-17 Hitachi Ltd Semiconductor device and manufacture thereof
US4700457A (en) * 1985-03-29 1987-10-20 Mitsubishi Denki Kabushiki Kaisha Method of making multilayer capacitor memory device
US4685197A (en) * 1986-01-07 1987-08-11 Texas Instruments Incorporated Fabricating a stacked capacitor
JPS63133565A (en) * 1986-11-25 1988-06-06 Matsushita Electronics Corp Semiconductor storage device
JPH0294560A (en) * 1988-09-30 1990-04-05 Toshiba Corp Semiconductor storage device and manufacture thereof
JPH02135772A (en) * 1988-11-16 1990-05-24 Mitsubishi Electric Corp Semiconductor device
US5057446A (en) * 1990-08-06 1991-10-15 Texas Instruments Incorporated Method of making an EEPROM with improved capacitive coupling between control gate and floating gate
US5162253A (en) * 1991-04-05 1992-11-10 Nec Corporation Method of producing capacitive element integrated circuit
US6617205B1 (en) 1995-11-20 2003-09-09 Hitachi, Ltd. Semiconductor storage device and process for manufacturing the same
US6791134B2 (en) 1995-11-20 2004-09-14 Hitachi, Ltd. Semiconductor memory device and manufacturing method thereof
US6798005B2 (en) 1995-11-20 2004-09-28 Hitachi, Ltd. Semiconductor memory device having large storage capacity and minimal step height between memory cell and peripheral circuits
US7196368B2 (en) 1995-11-20 2007-03-27 Renesas Technology Corp. Semiconductor memory arrangements with crown shaped capacitor arrangements trenched in interlayer dielectric film
US6403455B1 (en) 2000-08-31 2002-06-11 Samsung Austin Semiconductor, L.P. Methods of fabricating a memory device
US6689668B1 (en) 2000-08-31 2004-02-10 Samsung Austin Semiconductor, L.P. Methods to improve density and uniformity of hemispherical grain silicon layers

Also Published As

Publication number Publication date
JPH0320905B2 (en) 1991-03-20

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