JPS5952834A - Plasma vapor reactor - Google Patents

Plasma vapor reactor

Info

Publication number
JPS5952834A
JPS5952834A JP57163729A JP16372982A JPS5952834A JP S5952834 A JPS5952834 A JP S5952834A JP 57163729 A JP57163729 A JP 57163729A JP 16372982 A JP16372982 A JP 16372982A JP S5952834 A JPS5952834 A JP S5952834A
Authority
JP
Japan
Prior art keywords
reactive gas
substrate
reaction
semiconductor layer
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57163729A
Other languages
Japanese (ja)
Other versions
JPH0436448B2 (en
Inventor
Shunpei Yamazaki
山崎 「しゆん」平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP57163729A priority Critical patent/JPS5952834A/en
Priority to US06/533,941 priority patent/US4582720A/en
Publication of JPS5952834A publication Critical patent/JPS5952834A/en
Priority to US06/828,790 priority patent/US4640845A/en
Priority to US06/828,908 priority patent/US4642243A/en
Priority to US07/127,602 priority patent/US4832981A/en
Publication of JPH0436448B2 publication Critical patent/JPH0436448B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/02Details
    • H01J37/18Vacuum locks ; Means for obtaining or maintaining the desired pressure within the vessel
    • H01J37/185Means for transferring objects between different enclosures of different pressure or atmosphere
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/505Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/511Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using microwave discharges
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/54Apparatus specially adapted for continuous coating

Abstract

PURPOSE:To improve productivity by setting up an introducing guide or an exhaust guide for a reactive gas in a cylindrical space, in which a substrate is arranged along the flow of the gas, in order to selectively orient the reactive gas and installing reaction vessels while mutually connecting them. CONSTITUTION:The substrates, one sides thereof have the surfaces to which the reactive gas is formed, are arranged in parallel in the cylindrical space at regular intervals of 3-4cm while their backs are fast stuck mutually by preventing dispersion to the whole sections in the reaction vessel of the reactive gas and utilizing the surfaces, to which the gas is formed, of the substrates, plasma discharge is executed only in the cylindrical space in which the substrates stand close together, and the reactive gas is introduced selectively, thus improving efficiency on the collection of the reactive gas. For prevent the discharge of the reactive gas by the guide 70 of a holder, a clearance 81 is brought to 1cm or less and the reactive gas is flowed in a stratiform shape. Side walls 96 are set up on the outsides of the grooves 95 while being separated by 10-20mm., and the generation of the turbulence of the reactive gas is prevented, thus improving the uniformity of film thickness at the end sections of the substrates 2.

Description

【発明の詳細な説明】 本発明は基板上Km’型、1型およびN型の導電型を有
する非単結晶半導体を層状に積層して形成・するに際し
、それぞれの半導体層をそれぞれに対応したプラズマ気
相反応用反応容器で形成せしめ、かつそれぞれの反応容
器を互いに連結して設けることによシ、外気(大気)に
ふれさせることなく半導体層を形成せしめるプラズマ気
相反応装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for stacking and forming non-single crystal semiconductors having conductivity types of Km' type, 1 type and N type on a substrate in a layered manner. The present invention relates to a plasma vapor phase reactor that is formed using plasma vapor phase application reaction vessels, and by connecting the reaction vessels to each other, it is possible to form a semiconductor layer without exposing it to outside air (atmosphere).

本発明は水素または/Xロゲン元素が添加された非単結
晶半導体層、好ましくは珪素、ゲルマニューム、炭化珪
素(810のみではなく、本発明においては5izO,
,0(x<1の総称を意味する)、珪化ゲ/L/ i二
:L−−ム(日1XGe+−y(0<x(1)珪化スズ
(81XE1nI−40<X(1)であって、この被膜
中に活性状態の水素またはノ・ロゲン元素を充填するこ
とにより、再結合中心密度の小さなP工およびN型の導
電型を有する半導体層を複数層形成し、その積層境界に
て接合例えばPN接合、P工接合、N工接合またはP工
N接合を形成するとともに、それぞれの半導体層に他の
隣接する半導体層からの不純物が混入して接合特性を劣
化させることなく形成するとともに、またそれぞれに半
導体層を形成する工程間に大気特に酸素にふれさせて、
半導体の一部が酸化されることによシ、眉間絶縁物が形
成されることのないようにした連続生産を行なうための
プラズマ気相反応用製造装置に関する。
The present invention is directed to a non-single crystal semiconductor layer doped with hydrogen or /
, 0 (means a general term for x<1), silicide Ge/L/i2: L--mu (day1XGe+-y (0<x(1) tin silicide (81XE1nI-40<X(1) Then, by filling this film with active hydrogen or a nitrogen element, a plurality of semiconductor layers having P-type and N-type conductivity types with a small recombination center density are formed, and at the layer boundary. For example, a PN junction, a P-type junction, an N-type junction, or a P-type-N junction is formed without impurities from other adjacent semiconductor layers being mixed into each semiconductor layer and deteriorating the bonding characteristics. In addition, between the steps of forming semiconductor layers on each layer, they are exposed to the atmosphere, especially oxygen.
The present invention relates to a plasma gas phase application manufacturing apparatus for continuous production in which glabellar insulators are not formed due to oxidation of a part of a semiconductor.

本発明は形成される半導体被膜がスパッタ(損傷)され
ることなく、さらに非単結晶半導体といえども基板上よ
多結晶学的に成長(GROWTE;1させる次め、被形
成面に平行に反応性気体およびプラズマ発生用の電界を
供給せしめることを特徴としている。
In the present invention, the semiconductor film to be formed is not sputtered (damaged), and even non-single-crystal semiconductors are grown polycrystalline (GROWTE) on the substrate. It is characterized by supplying an electric field for generating gas and plasma.

さらに本発明は、かかる多数の反応容器を連結したマル
チチアンバ一方式のプラズマ反応装置において、一度に
多数の基板を同時にその被膜成長速度を大きくしたいわ
ゆる多量生産方式このため、反応性気体が反応容器内の
すべてに分散してしまうことを防ぎ、基板の被形成面を
利用して、筒状の空間に被形成面を1つの側に有する基
板を裏面を互いに密接して、一定の距離例えば2〜6c
m代表的には3〜4cm離して平行に配列し、この基板
が林立した筒状空間においてのみプラズマ放電を行なわ
しめ、加えて反応性気体を選択的に導びき、結果として
反応性気体の収集効率を従来の1〜3%よシその20〜
60倍の40〜70%にまで高めたことを特徴としてい
る。
Furthermore, the present invention uses a multi-chamber type plasma reactor in which a large number of reaction vessels are connected, and uses a so-called mass production method in which a large number of substrates are simultaneously grown at a high film growth rate. By using the surface of the substrate to be formed, the substrates having the surface to be formed on one side are placed in a cylindrical space with their back surfaces close to each other at a certain distance, e.g. 6c
Typically, these substrates are arranged in parallel at a distance of 3 to 4 cm, and plasma discharge is performed only in the cylindrical space in which these substrates stand. Efficiency improved by 1-3% compared to conventional method Part 20-
It is characterized by being increased by 40 to 70%, which is 60 times higher.

さらにその際多数回くシかえして被膜形成を行なうと、
その時反応容器上部に付着形成されたフレーク(微少ぜ
つ片)(微粉末)が基板の被形成面上Kltt−xピン
ホールの発生を銹発してしまうことを防ぐため、基板の
被形成面を重力にそって配向せしめたことを特徴として
いる。
Furthermore, when forming a film by repeating it many times,
At that time, in order to prevent the flakes (fine particles) attached to the upper part of the reaction vessel from causing Kltt-x pinholes on the surface of the substrate to be formed, the surface of the substrate to be formed was It is characterized by being oriented along the direction of gravity.

本発明は、このフレークが反応性気体の導入口側で多数
発生してしまうことを防ぐため、反応性気体の導入口側
に網目状または多穴状に設けられた電極を負電極とし、
排気口側に正電極を設けたことを特徴としている。即ち
、本発明は実験的にフレークが正電極近傍に多く発生し
やすいことを見出し、このため負電極側を反応炉の上部
または反応性気体の導入口側シて配したことを特徴とし
ている。
In order to prevent a large number of flakes from being generated on the reactive gas inlet side, the present invention uses an electrode provided in a mesh or multi-hole shape on the reactive gas inlet side as a negative electrode,
It is characterized by a positive electrode provided on the exhaust port side. That is, the present invention has experimentally found that many flakes tend to occur near the positive electrode, and is therefore characterized by arranging the negative electrode side at the top of the reactor or at the reactive gas inlet side.

本発明は2〜10cm好ましくは3〜5cmの一定の間
隙をへて被形成面を概略平行に配置された基板の上部、
下部および中央部;周辺部での膜厚の均一性、また膜質
の均質性を促すため、赤外線ランプを被形成面方向に設
け、さらに少なくとも上方向および下方向よシ棒状赤外
線ランプを互いに90’曲げて配置し、均熱化t?はか
った。即ち10 c m’または電極方向に10〜20
cmを有する中10〜100cmの基板の多くが、その
温成分布において、100〜400″C例えば200±
10°C以内好ましくは±5’O以内としたことを特徴
としている。
In the present invention, the upper part of the substrate is arranged so that the surface to be formed is approximately parallel with a certain gap of 2 to 10 cm, preferably 3 to 5 cm;
In order to promote uniformity of film thickness and homogeneity of film quality in the lower and central parts: peripheral parts, infrared lamps are provided in the direction of the surface to be formed, and furthermore, rod-shaped infrared lamps are installed at least 90' from each other in the upper and lower directions. Bend it and place it, then heat it up. measured. i.e. 10 cm' or 10-20 cm in the electrode direction
Many of the medium 10 to 100 cm substrates with a temperature range of 100 to 400"C, for example 200±
It is characterized by being within 10°C, preferably within ±5'O.

−に主として選択的にプラズマ放電させるとともに、反
応性気体をその空間に主として選択的に流入せしめるべ
きガイドを設けたことを特徴としている。さらに本発明
においては、かかる条件を満しながらも互いに横方向に
連結したマルチチアンバー間を基板が移動するに際し何
らの支障にならないように、電極、反応性ガスの導入口
および排気口を設け、さらに加熱赤外線を設けたことを
特徴としている。
The present invention is characterized in that a guide is provided to selectively cause plasma discharge primarily in the space and to selectively flow reactive gas primarily into the space. Furthermore, in the present invention, electrodes, reactive gas inlets, and exhaust ports are provided so as to satisfy these conditions and not cause any hindrance when the substrate moves between the multi-chambers that are laterally connected to each other. It is also characterized by the provision of heating infrared rays.

かくの如くにマルチチアンバ一方式を基本条件としてい
るため、それぞれの反応容器内での被膜の特性の向上に
加えて、チアンバー内壁に不要の反応生成物が付着する
ことを防ぎ、逆に加えて供給した反応性気体の被膜にな
る割合即ち果状効率を高めるため、チムニ−(煙突)状
に反応性気体を基板の配置されている筒状空間に設け、
基板の被形成面が実質的にチムニ−の内壁を構成せしめ
たことを特徴とするプラズマ気相反応装置に関する。
As described above, since the multi-chamber one-type system is the basic condition, in addition to improving the properties of the coating in each reaction vessel, it also prevents unnecessary reaction products from adhering to the inner wall of the chamber, and conversely, it also improves the supply. In order to increase the rate at which the reactive gas forms a film, that is, the fruit-like efficiency, the reactive gas is provided in a chimney shape in the cylindrical space where the substrate is placed.
The present invention relates to a plasma vapor phase reactor characterized in that the surface of the substrate to be formed substantially constitutes the inner wall of a chimney.

また本発明は、反応容器を積層する半導体層の数だけ連
設したプラズマ反応用製造装置に関する。
The present invention also relates to a plasma reaction manufacturing apparatus in which reaction vessels are successively arranged in equal numbers to the number of semiconductor layers to be laminated.

従来非単結晶半導体例えばアモルファス珪素のプラズマ
気相反応において、その製造装置の放電方式は13.5
6MHz等の高周波を一対の面状の平板電極を平行平板
型電極方式として設け、その一方の電極上に被形成面を
有する基板を配置させ、基板の一主面側のみ選択的に被
膜成長をさせたものであった。さらにかかる方法におい
ては、反応性気体の導入に関しても、電極の他方よシ被
形成面に垂直方向にふき出す方式、また反応容器内に単
に反応性気体のガスを導入し、反応容器全体に反応性気
体を充満させ、特に反応性気体に一方方向へのガス流を
構成させることなく供給する方式が知られている。しか
しこの従来よシ知られているこれらの方式においては、
被膜の成長速度が0.1〜2に秒と小さい。特に反応性
気体を反応容器内全体に充満させる方式においては、’
 O,1−()、 4X、/秒ときわめて小さく、加え
て反応生成物がフレーク状にチアンバー内壁に付着し、
それらが基板上に落下してピンホールの発生を誘発して
しまった〇 ま7c基板を電極間に1まいのみ電極と平行に配置し、
その−主面上のみに半導体層を形成する。このため量産
性が全く十分でなく、その代表的な応用例である太陽電
池を作製した時、その製造原価は10 c m’の基板
の大きさにて5000円をこえ、さらにその内の400
0円以上ケよ設備償却費という全く非常識な現状であっ
た。
Conventionally, in the plasma vapor phase reaction of non-single crystal semiconductors such as amorphous silicon, the discharge method of the manufacturing equipment is 13.5
A high frequency such as 6 MHz is applied using a pair of planar flat plate electrodes as a parallel plate type electrode system, a substrate having a surface to be formed is placed on one of the electrodes, and a film is selectively grown only on one principal surface of the substrate. It was something that I did. Furthermore, in this method, regarding the introduction of the reactive gas, there is a method in which the reactive gas is blown out from the other side of the electrode in a direction perpendicular to the surface to be formed, and a method in which the reactive gas is simply introduced into the reaction container and the reaction occurs throughout the reaction container. It is known to fill the reactor with a reactive gas, in particular to supply a reactive gas without forming a unidirectional gas flow. However, in these conventionally known methods,
The growth rate of the film is as small as 0.1 to 2 seconds. In particular, in a method in which the entire reaction vessel is filled with reactive gas, '
O,1-(),4X,/sec, which is extremely small, and in addition, the reaction products adhere to the inner wall of the chamber in the form of flakes.
They fell onto the substrate and induced the generation of pinholes.Place the 〇ma7c substrate between the electrodes parallel to the electrodes,
A semiconductor layer is formed only on the main surface. For this reason, mass production is not sufficient at all, and when producing a solar cell, which is a typical application example, the manufacturing cost exceeds 5,000 yen for a substrate size of 10 cm', and 400
The current situation was completely insane, with equipment depreciation costs exceeding 0 yen.

このため10cm’の基板の大きさでその10〜30倍
の生産性を同じ大きさの反応容器にて作製するための製
造装置が強く求められていた。
For this reason, there has been a strong demand for a manufacturing apparatus that can produce substrates with a substrate size of 10 cm' and a productivity 10 to 30 times that size in a reaction vessel of the same size.

本発明はかかる目的を満たすためなされ次ものである。The present invention has been made to meet these objectives.

半導体装置は単に真性の半導体のみではなくP型、N型
の半導体層をその設計事項に従って自由に重ね合わせて
接合を有せしめ得ることがその工学的応用を広げるもの
である。
Semiconductor devices are not only made of intrinsic semiconductors, but also have P-type and N-type semiconductor layers that can be freely stacked and bonded according to their design, which expands their engineering applications.

このため、かかる異種導電型の半導体層を同一反応容器
で作ることは、その生産性が向上しても、それぞれの導
電型用の不純物が互いに半導体層内でスパッタ効果によ
シ混合してしまう。
For this reason, even if productivity is improved when semiconductor layers of different conductivity types are made in the same reaction vessel, impurities for each conductivity type will mix with each other within the semiconductor layer due to the sputtering effect. .

そのためPN%PI、NxまたはFIN接合を少なくと
も1つ有する半導体層を複数層積層するに際し、その界
面で接合を十分構成させようとした時、それぞれの導電
型用の反応容器を前記したように独立分離せしめること
がきわめて重要である。
Therefore, when stacking multiple semiconductor layers having at least one PN%PI, Nx or FIN junction, when trying to form a sufficient junction at the interface, it is necessary to separate the reaction vessels for each conductivity type as described above. It is extremely important to separate them.

本発明はかかる分離独立方式に加えて、さらにその不純
物の混合を排除させ、接合特性の向上を計ったものであ
る。すなわち例えば1つのP工N接合を積層して形成さ
せようとする時、第1の半導体層としてのP型半導体層
を形成させた場合、その半導体層の形成の際同時にこの
不純物の吸着が反応容器の内壁また基板ホルダー表面に
おきる。本発明においてはこれら基板上の被形成面以外
の壁面、表面からの不純物の再放出を防ぎ、また供給系
、排気系からの一度吸着した反応性気体の第2の半導体
層の形成に際し、離脱混入することを防ぐため、反応容
器のみではなく、反応性気体の供給系、排気系もそれぞ
れ独立に各反応容器に対応して設けられている。また基
板ホルダーに関しても、基板のみが実質的に反応生成物
の付着被膜化がおきるように、基板の皺形成面側のみプ
ラズマ化された反応性気体が導びかれるように設けてい
る。
In addition to such a separate and independent method, the present invention aims to improve the bonding characteristics by eliminating the mixing of impurities. That is, for example, when trying to form one P-N junction by stacking a P-type semiconductor layer as the first semiconductor layer, the adsorption of impurities reacts at the same time as the semiconductor layer is formed. Occurs on the inner wall of the container or the surface of the substrate holder. In the present invention, impurities are prevented from being re-released from walls and surfaces other than the surface on which they are formed on the substrate, and reactive gases once adsorbed from the supply system and exhaust system are released when forming the second semiconductor layer. In order to prevent contamination, not only reaction vessels but also reactive gas supply systems and exhaust systems are provided independently for each reaction vessel. The substrate holder is also provided in such a way that the plasma-converted reactive gas is guided only to the wrinkle-forming surface of the substrate so that only the substrate is substantially coated with reaction products.

しかしさらにその不純物の混合の鮮紅1検討をすすめた
結果、これだけでは不十分でお沙、さらに形成された第
1の半導体層それ自体も不純物の混入源となシ得ること
が明らかになった。
However, as a result of further investigation into the mixing of impurities, it became clear that this alone was not sufficient and that the formed first semiconductor layer itself could also be a source of impurity mixing.

そのためその上面に第2の半導体層を形成させようとす
る時、この下地に対し第2の半導体層を成長させ、下地
半導体層を反応性気体が衝突するように被形成面上に供
給されてスパッタ効果を極力さけることがきわめて重要
であることが判明した。
Therefore, when trying to form a second semiconductor layer on the upper surface, the second semiconductor layer is grown on this base, and the reactive gas is supplied onto the surface to be formed so as to collide with the base semiconductor layer. It has been found that it is extremely important to avoid sputter effects as much as possible.

即ち被形成面に対し高周波電界が垂直にカロえられた場
合、この電界しくよシプラズブ化された反応性気体が下
地に強く衝突する。このため第2の半導体層を積層して
いる時同時にその界面ではお互いが混合し合ってし゛ま
った。その結果従来よシ知られた平行平板型電極の一方
の電(a面に平行に被形成面を配向させる(すなわち1
1界は基板表面に垂直)と、たとえ不純物の混合を独立
反応容器方式にて排除しても十分でなくそのお互いの混
合部は約1000−2000λもおることが判明した。
That is, when a high-frequency electric field is applied perpendicularly to the surface to be formed, the reactive gas that has been converted into a plasma by this electric field strongly collides with the substrate. For this reason, when the second semiconductor layers were being stacked, they mixed with each other at the interface. As a result, the surface to be formed is oriented parallel to the a-plane of one of the conventionally known parallel plate electrodes (i.e., 1
1 field is perpendicular to the substrate surface), and even if the mixing of impurities was eliminated using an independent reaction vessel system, it was found that it was not sufficient and the area where they were mixed with each other was approximately 1000-2000λ.

本発明はかかる欠点を防ぐため、独立分離のマルチチア
ンバー反応方式であって、かつそのプラズマ反応に用い
られる直流または高周波電界は被形成面に概略平行にし
たこと、さらに反応性気体を被形成面にそって流れるよ
うに層流を構成して供給させ、反応性気体がチアンバー
内を乱流を作って混合することを防いだ。これらの処理
に加えて、反応性気体の導入口、排気口においてガイド
を設け、この間の基板の被形成面によシ実質的に作られ
た筒状空間のみに選輛 Xが拡散し広がることを防いだものである。かかる本発
明の構造のプラズマ気相反応装置とすることにより、形
成された不純物のそれぞれの半導体層から他の半導体層
への混合を排除し、その混合部を200−600^と約
1/1い−115Kするとともに、結晶学的KP型の半
導体層上に連続してショートレンジオーダの結晶性(秩
序性)を有する真性または実質的に真性の半導体層をも
成長し得たことを特徴としている。またP1N型半導体
層を形成してPN接合を設けても、単なるオーム抵抗特
性ではなく、逆方向リークが5■にて1μ八以下のダイ
オード特性を有せしめた効果を有した。
In order to avoid such drawbacks, the present invention employs an independently separated multi-chamber reaction method, and the direct current or high frequency electric field used for the plasma reaction is approximately parallel to the surface to be formed, and furthermore, the reactive gas is A laminar flow was configured and supplied so that it flowed along the surface, and reactive gases were prevented from creating turbulent flow within the chamber and mixing. In addition to these treatments, guides are provided at the reactive gas inlet and exhaust port, and the selective material X is diffused and spread only in the cylindrical space substantially created by the formation surface of the substrate between the guides. This prevents By using the plasma vapor phase reactor having the structure of the present invention, mixing of formed impurities from each semiconductor layer to another semiconductor layer is eliminated, and the mixing portion is reduced to about 1/1 of 200-600^. -115K, and an intrinsic or substantially intrinsic semiconductor layer having short range order crystallinity (order) can be grown continuously on a crystallographic KP type semiconductor layer. There is. Furthermore, even when a P1N type semiconductor layer was formed to provide a PN junction, it had the effect of providing not just ohmic resistance characteristics but also diode characteristics with reverse leakage of 1 μ8 or less at 5 μm.

かくすることによシ、その接合またその近傍に集中して
いる再結合中心の密度を十分小さくさせるととができた
。即ち再結合中心は不純物の混合によりアクセプタ、ド
ナーにならない■価の不純物とV価の不純物が相互作用
して深いトラップレベルを作るが、かかるトラップセン
゛ タ(再結合中心)を混合部の厚さをうずくすること
により少なりL7、また結晶学的に成長させることによ
υ真性半導体の不対結合手の存在源7を   、71 度を従来の10〜10cm−よシ約コ、/]、OOの1
0〜″ノづ 10 am K したことを特徴としている。
By doing this, it was possible to sufficiently reduce the density of recombination centers concentrated at or near the junction. In other words, the recombination center does not become an acceptor or donor due to the mixing of impurities.I-valent impurities and V-valent impurities interact to create a deep trap level. 71 degrees can be reduced from the conventional 10 to 10 cm, /] , OO's 1
0 to 10 am K.

以下に本発明の実施例を図面に従って説明するO 実施例1 第1図に従って本発明のプラズマ気相反応装置の実施例
を説明する。
Embodiments of the present invention will be described below with reference to the drawings.O Example 1 An embodiment of the plasma vapor phase reactor of the present invention will be described with reference to FIG.

この図面けP工接合、N工接合、PN接合、P工N接合
、P工N工P接合、N工P工N接合またはP工NP工N
0拳・PIN接合等(〕基板上の半導体に異種導電型ま
たは同種導電型であシながらも形成される半導体の主成
分または化学量論比の異なる半導体層をそれぞれの半導
体層をその前の工程において形成された半導体層の影響
を受けることを防ぐため、前の半導体層を形成した反応
容器に連設した他の独立した反応容器で第2の半導体層
全形成して、前の半導体層上に積層して接合を作るとと
もに、さらに多層に自動かつ連続的((形成するための
装置である。
In this drawing, P-work joint, N-work joint, PN joint, P-work N joint, P-work N-work P joint, N-work P-work N joint, or P-work NP-work N
0-fist, PIN junction, etc. () Semiconductor layers of different conductivity types or the same conductivity type but with different main components or stoichiometric ratios of the semiconductors formed on the semiconductor on the substrate are connected to each semiconductor layer before it. In order to prevent the influence of the semiconductor layer formed in the process, the second semiconductor layer is entirely formed in another independent reaction vessel connected to the reaction vessel in which the previous semiconductor layer was formed, and the second semiconductor layer is completely formed. This is a device for automatically and continuously forming layers on top of each other to create a bond.

図面においては特KP工N接合を構成する3つのP、 
■およびN型の半導体層を積層して形成する第1および
第2の予備室を有するマルチチアンパー(ここでは3つ
の反応容器)方式のプラズマ気相反応装置の装置例を示
す。
In the drawing, the three P's that make up the special KP N-joint,
1) An example of a multi-chamber (here, three reaction vessels) type plasma vapor phase reactor having first and second preliminary chambers formed by stacking and stacking N-type and N-type semiconductor layers is shown.

図面における系I、n、Iは3つの各反応容器(6) 
、 (7) 、 (8)を有し、それぞれ独立して反応
性気体の導入手段αカ、a樟、α傍と排気手段(イ)、
e心。
Systems I, n, I in the drawing represent each of the three reaction vessels (6)
, (7), and (8), each having independently reactive gas introduction means α, a, α, exhaust means (a),
e heart.

に)とを有し、反応性気体が供給系または排気系から逆
流または他の系からの反応性気体の混入を防いでいる。
) to prevent reactive gases from flowing back from the supply system or exhaust system or from mixing with reactive gases from other systems.

この装置は入口側には第1の予備室(5)が設けられ、
とびら(42)よシ基板ホルダ(ホルダともいう)(’
14)K基板(4) 、 (4:)を挿着し、この予備
室に配置させた。この被形成面を有する基板は被膜形成
を行なわない裏面を互いに接し、2〜100m好ましく
はト5 cmの間隙を有して林立させている。この間隙
は基板の反応性気体の流れ方向の長さが’loCm、 
15cm、 20cmと長くなるにつれて、3−4 c
 m1〜5cm5トロcnnと広げた。さらにこの第1
の予備室(5)を真空ポンプ05)Kでバルブ(3すを
開けて真空引をした。この後予め真空引がされている反
応容器(6) 、 (′7) 、 (8)にゲート弁←
4)を開けて基板およびホルダを移した。例えば予備室
(5)より容器(6)K移し、さらにゲート弁04)を
閉じることによシ移動させたものである。この時反応容
器(6)ニ保持されていた基板(Sりは反応容器(8)
 K 、また反応容器(ツ)に保持されていた基板(2
)は反応容器(8) K %また反応容器(8)K保持
されていた基板は第2の出口側の予備室(9)K同時に
ゲート弁(45) (46) (47)を開けて移動さ
せた。
This device has a first preliminary chamber (5) on the entrance side,
Door (42) and board holder (also called holder) ('
14) K substrates (4) and (4:) were inserted and placed in this preliminary chamber. The substrates having the surfaces to be coated are arranged in a row with their back surfaces on which no coating is to be formed in contact with each other with a gap of 2 to 100 m, preferably 5 cm. The length of this gap in the flow direction of the reactive gas of the substrate is 'loCm,
As the length increases to 15cm and 20cm, 3-4c
It was spread to m1-5cm5 torocnn. Furthermore, this first
The preparatory chamber (5) was evacuated with a vacuum pump 05)K by opening the valve (3).After this, the gates were inserted into the reaction vessels (6), ('7), and (8), which had been evacuated in advance. Valve←
4) was opened and the substrate and holder were transferred. For example, the container (6)K is moved from the preliminary chamber (5), and then the container (6)K is moved by closing the gate valve 04). At this time, the substrate held in the reaction container (6) (S is in the reaction container (8)
K, and the substrate (2) held in the reaction vessel (2).
) is the reaction vessel (8) K %Also, the substrate held in the reaction vessel (8)K is moved to the preliminary chamber (9)K on the second outlet side by opening the gate valves (45) (46) (47) at the same time. I let it happen.

2 第2の予備室に移された基板はゲート弁0″Qが閉じら
れた後(41)より窒素が導入されて大気圧にされ、0
3)のとびらよシ外に出した。
2 After the gate valve 0''Q is closed, nitrogen is introduced into the substrate transferred to the second preliminary chamber (41) and the pressure is brought to atmospheric pressure.
3) The door was taken outside.

即ちゲート弁の動きはとびら(42) 、 (43)が
大気圧で開けられた時はゲート弁(44) (45) 
(46) (4’7)22フ は閉じられ、各チアンバーにおいてはプラズマ気相反応
が行なわれる。また逆にとびら(4つ(43)が閉じら
れていて予備室(5) 、 (9)が十分真空引された
時は、ゲート弁(4の、 (45) 、 (46) 、
 (4’7)が開き、各チアンバーの基板、ホルダは隣
シのチアンバーに移動する機構を有している。
In other words, the movement of the gate valve is the door (42), and when the door (43) is opened at atmospheric pressure, the gate valve (44) and (45).
(46) (4'7) 22 chambers are closed, and a plasma gas phase reaction is carried out in each chamber. Conversely, when the four doors (43) are closed and the preliminary chambers (5), (9) are sufficiently evacuated, the gate valves (4, (45), (46),
(4'7) is opened and the substrate and holder of each chamber are moved to the adjacent chamber.

系IKおける第1の反応容器(6)でのP型半導体層を
形成する場合を以下に記す。
The case of forming a P-type semiconductor layer in the first reaction vessel (6) in system IK will be described below.

反応系I (反応容器(6)を含む)は]−0〜1ot
orr好ましくは0.0ト1torr例えば0.1tO
rrとした。
Reaction system I (including reaction container (6)) is -0 to 1ot
orr preferably 0.0 torr, for example 0.1 torr
It was set as rr.

反応性気体は珪化物気体(財)に対してはシラン(S 
i n Htll、n≧1特KSiH)、ジクロールシ
ラン(S i H,9]?)、トリクロールシラン(S
iHO]、)、四7ノ化珪素(SiF、)等があるが、
取扱いが容易なシランを用いた。価格的にはジクロルル
シランの方が安価であシ、これを用いてもよい。
The reactive gas is silane (S) for silicide gas (goods).
i n Htll, n≧1Special KSiH), dichlorosilane (S i H,9]?), trichlorosilane (S
iHO], ), silicon tetra7ide (SiF, ), etc.
Silane was used because it is easy to handle. Dichlorosilane is cheaper and may also be used.

本実施例のBLxO(−A(0<xcl)を形成するた
め炭化物気体(ハ)に対してはメタン<anを用いたO
C4のような炭化物気体であっても、また四塩化炭素(
CIOηのような塩化炭素であってもよい。
In order to form BLxO(-A(0<xcl) in this example, O
Even if it is a carbide gas such as C4, carbon tetrachloride (
It may also be carbon chloride such as CIOη.

炭化珪素(81XOz−a 0(X(1) K対しては
、Pfflの不純物としてボロンを水素にて2000P
PM K希釈されたジボランよシ(ハ)よシ供給した。
For silicon carbide (81XOz-a 0(X(1)
PM K-diluted diborane was supplied.

またガリュームをT M G (G a (OHll)
J ) Kよ#)10 補XIOamの濃度になるよう
に加えてもよい。
Also, T M G (G a (OHll))
J) Kyo #) 10 Supplementary XIOam may be added to the concentration.

キャリアガス(39)は反応中は水素(H,)を用いた
が、反応開始の前後は窒素(N)を液体窒素により利用
した。これらの反応性気体はそれぞれの流量計(33)
およびパルプ(32)をへて、反応性気体の導入口a−
hよシ高周波電源の負電極(6υをへて反応容器(6)
K供給された。反応性気体は(70)のガイドをへて筒
状空間を構成する基板(1)およびホルダ(’/4)内
に導入され、負電極(6])と正電極(51)間を電気
エネルギ例えば’13.56MH2の高周波エネルギを
加えて反応せしめ、基板上に反応生成物を被膜形成せし
めた。
As the carrier gas (39), hydrogen (H, ) was used during the reaction, but nitrogen (N) was used in the form of liquid nitrogen before and after the start of the reaction. These reactive gases are connected to their respective flow meters (33).
and through the pulp (32), the reactive gas inlet a-
Pass through the negative electrode of the high frequency power supply (6υ to the reaction vessel (6)
K was supplied. The reactive gas passes through the guide (70) and is introduced into the substrate (1) and holder ('/4) that constitute the cylindrical space, and generates electrical energy between the negative electrode (6]) and the positive electrode (51). For example, high frequency energy of 13.56 MH2 was applied to cause a reaction, and a reaction product was formed as a film on the substrate.

基板は10G−400°C例えば20Q’OK赤外線ヒ
ータへ)都によυ加熱した。
The substrate was heated to 10G-400°C (for example, using a 20Q'OK infrared heater).

この赤外線ヒータは赤外線イメージ炉ともいい、棒状を
有するため上方のヒータと下方+7)ヒータとが互いに
直交する方向に配置して、この反応容器内における特に
筒状空間を200±10″a好ましくは±5’a以内に
設置した。とのヒータは上側または下側のみでは反応性
気体の流れ方向に200−120″0と80’Oをも不
均一を生じ、全く実用にならなかった◇を九互いに直交
させることによシ、基板間の温度分布も±10′O10
″0ることができた。この後、前記したが、この容器に
前記した反応性気体を導入し、さらK 1O−50Wに
高周波エネルギα4を供給してプラズマ反応をおこさせ
た。
This infrared heater is also called an infrared image furnace, and since it has a rod shape, the upper heater and the lower +7) heater are arranged in directions perpendicular to each other, so that the cylindrical space in the reaction vessel is preferably 200±10″a. The heater was installed within ±5'a. If the heater was installed only on the upper or lower side, it would cause non-uniformity between 200-120"0 and 80'O in the flow direction of the reactive gas, making it completely impractical. By making them orthogonal to each other, the temperature distribution between the substrates can also be ±10'O10.
After that, as described above, the reactive gas described above was introduced into this container, and high frequency energy α4 was further supplied to K1O-50W to cause a plasma reaction.

かくしてP型半導体層はP」メ81EL、二〇。5チ。Thus, the P-type semiconductor layer is P''me81EL, 20. 5 chi.

o V(s IB、−+O糧二0.5の条件にて、この
反応系■で約100λの厚さを有する薄膜として形成さ
せた(、 Fig”2. OeV、” lXl0〜3X
10 (ncn9であった。
A thin film having a thickness of about 100λ was formed in this reaction system (2) under the conditions of o V(s IB, -+O20.5).
10 (ncn9).

従来炭化珪素は一般に珪素のみに比べて大きな高周波エ
ネルギを必要とする。そのため、電界が被形成面に垂直
方向の場合、被形成面に設けられた透明導電膜(工TO
または酸化スズの600−40 OAの電極用被膜)は
スパッタされて、酸化スズが金属スズに変わって透明で
なく白濁しゃすい0 しかし本発明の実施例に示される如く、プラズマ電界を
被形成面に概略平行にすると、この電界による反応生成
物は表面にそって移動するため、スパッタ効果による白
濁化は30−50’!加えても見られず、垂直電界の場
合が2−5Wが限界だったことに比べて、特性歩留シお
よび製造歩留シを向上させた。
Conventional silicon carbide generally requires greater high frequency energy than silicon alone. Therefore, when the electric field is perpendicular to the surface to be formed, the transparent conductive film provided on the surface to be formed (TO
Or a tin oxide (600-40 OA electrode coating) is sputtered, and the tin oxide changes to metallic tin, making it cloudy instead of transparent. However, as shown in the embodiments of the present invention, the plasma electric field When parallel to the surface, the reaction products caused by this electric field move along the surface, so the clouding due to the sputtering effect is 30-50'! Compared to the vertical electric field, which had a limit of 2-5 W, the characteristic yield and manufacturing yield were improved.

基板は導体基板(ステンレス、チタン、窒化チタン、そ
の他の金属)、半導体(珪素、炭化珪s、ゲルマニュー
ム)、絶縁体(アルミナ、ガラス、有機物質)または複
合基板(ガラス絶縁基板上に酸化スズ、■To等の導電
膜が単層またはITo上に8nOzが形成された2層膜
が形成されたもの、絶縁基板上に選択的に導体電極が形
成されたもの、絶縁基板上KPまたはN型の半導体が形
成されたもの)を用いた。本実施例のみならず本発明の
すべてにおいてこれらを総称して基板という0もちろん
この基板は可曲性であってもまた固い板であってもよい
The substrate can be a conductive substrate (stainless steel, titanium, titanium nitride, or other metal), a semiconductor (silicon, silicon carbide, germanium), an insulator (alumina, glass, organic material), or a composite substrate (tin oxide on a glass insulating substrate, ■A single layer conductive film such as To or a double layer film of 8nOz formed on ITo, a conductor electrode selectively formed on an insulating substrate, a KP or N type conductive film on an insulating substrate (on which a semiconductor was formed) was used. In this embodiment as well as in all of the present invention, these are collectively referred to as a substrate.Of course, this substrate may be flexible or may be a rigid plate.

かくしてす4分間プラズマ反応をさせて、P型不純物と
−リf■1−ムが添加された炭化珪素膜を作製した。さ
らにこの第1の半導体層上に基板を前記した操作順序に
従って第2の反応容器(7)K移動し、ここで真性の半
導体層を約5000大の厚さに形成させた0 すなわち第1図における反応系Hにおいて、半導体の反
応性気体としてシジンを(ハ)よシ、また水素等のキャ
リアガスな必要に応じて@(ハ)よシ供給して、一対を
構成する電極(1H心にて系I] と同様に高周波電源αI)よ−) 13.56MH2の
高周波エネルギを供給した。基板は2ao”c[ヒータ
θa(lよシ加熱した。反応性気体は基板(2)の被形
成面にそって上方よυ下方に流れ、真空ポンプ(3ηに
ζ至る。系1目でおいて(43)の出口側よりみたたて
断面図を第2図に示す。
In this manner, a plasma reaction was carried out for 4 minutes to produce a silicon carbide film doped with P-type impurities and -rim. Further, the substrate was transferred onto the first semiconductor layer to a second reaction vessel (7) according to the above-described operating sequence, and an intrinsic semiconductor layer was formed therein to a thickness of about 5000 nm. That is, as shown in FIG. In the reaction system H, cysine is supplied as a reactive gas for the semiconductor (C), and a carrier gas such as hydrogen is supplied as necessary to form a pair of electrodes (1H core). Similarly to system I), high frequency power source αI) supplied high frequency energy of 13.56 MH2. The substrate was heated by a heater θa (l).The reactive gas flows upward and downward along the surface of the substrate (2) to be formed, and reaches ζ to a vacuum pump (3η. A cross-sectional view of (43) viewed from the exit side is shown in FIG.

第2図を概説する。Figure 2 is outlined.

第2図1でおいて反応容器(1)はのぞき窓α8)電波
漏えい防止用銅網(49)*裏側にマイクロ波供給用の
石英窓(55)導波管(54)、さらにマイクロ波また
はミリ波用電源(56)を具備している。基板(2)の
被形成面にそって平行に反応性気体(ロ)、に)、(ハ
)および高周波00の電界が配されるように設けである
In Figure 2 1, the reaction vessel (1) has a peephole α8) a copper mesh for preventing radio wave leakage (49), and a quartz window (55) and waveguide (54) for microwave supply on the back side, and a microwave or It is equipped with a millimeter wave power source (56). The reactive gases (b), ni), and (c) and the electric field of high frequency 00 are arranged parallel to the surface of the substrate (2) to be formed.

さらに高周波に加えて1GHz以上の周波数例えば2.
45GH2のマイクロ波が供給されている0第2図にお
いて、反応性気体は(66)より導入され、石英管導入
口よシ網状または多孔状の電極(6′Qをへて導出させ
た。反応性気体の導出口0→、基板(2)、ホルダ0荀
、排気口Q■、一対の電極(6’7)、 (6B)の相
関関係については、第3図にさらにその斜視図(前半分
を切断しである)で示している。
Furthermore, in addition to high frequencies, frequencies of 1 GHz or higher, such as 2.
In Fig. 2, where a microwave of 45GH2 is being supplied, the reactive gas was introduced from (66) and led out through the quartz tube inlet and the mesh-like or porous electrode (6'Q). The relationship between the gas outlet 0→, the substrate (2), the holder 0, the exhaust port Q, and the pair of electrodes (6'7) (6B) is shown in Figure 3, which is a perspective view (the first half). (the minutes are cut off).

即ち、第3図において基板(2)は裏面を互いに合せて
さしこみ式になったホルダ(74)に垂直方向(鉛直方
向)K互いに一定の間隙例えば3cmにて平行に配置さ
れている0ホルダは石英よシなシ、上側に円板状のディ
スクとこれに連結した基板用みぞ(94)を有している
。ディスクは4つのサポータ(so) (so)によシ
空間に保持され、サポータ(so) (sφは軸(’1
9) (’79)の回転に従って2 回転し、その結果ディスクを3−’l O回/分の速度
で回転し、反応性気体の均質化を促進させている。
That is, in FIG. 3, the substrate (2) is placed in parallel with the holder (74) with its back surfaces aligned with each other with a fixed gap of, for example, 3 cm, in the vertical direction (vertical direction). It is made of quartz and has a disk-like disk on the upper side and a substrate groove (94) connected to the disk. The disk is held in space by four supporters (so) (sφ is the axis ('1
9) ('79) 2 revolutions, thereby rotating the disk at a speed of 3-'l O times/min to promote homogenization of the reactive gas.

反応性気体は導出口0→よりl−3mmの穴03)をヘ
テ網状電極(穴約5−10mm ) (6’7:lをへ
て、下方向にふき出させている。ホルダのガイドe70
)により反応性気体の(80)方向への放出を防ぐため
、(81)の間隙は1cm以下好ましくは2−5mmと
した。そして反応性気体は基板(2)(2)の被形成面
および基板(2)をたてるためのみぞ(95)を保持す
に層状に流させた0石英の側壁(9つはみぞ(95)よ
シ外側K 10=20mm離れて設け、反応性気体の側
壁(96)でのみだれの発生を防ぎ、そのことによシ基
板(2)の端部での被膜の膜厚の均一性をよシ促進させ
た。
The reactive gas is blown out downward from the outlet 0 → through the hole 03 (1-3 mm) through the mesh electrode (hole approximately 5-10 mm) (6'7:1).Holder guide e70
), the gap between (81) was set to 1 cm or less, preferably 2-5 mm, in order to prevent the reactive gas from being released in the (80) direction. The reactive gas is then flowed in a layered manner on the surface of the substrate (2) (2) to be formed and on the side wall of the quartz (9 grooves (95) ) is provided at a distance of 20 mm from the outer side of the substrate (96) to prevent the reactive gas from sagging on the side wall (96), thereby improving the uniformity of the film thickness at the edge of the substrate (2). I promoted it.

また排気系に関しても、(8すからの反応性気体の流入
を少なく L、(85)を選択的fluさせるため、ガ
イドC/1)と基板下端との間隙をICm以下に合せて
設けた。即ち(8す、(8優のガス流のコンダクタンス
を(8す(85)の約1h以下好ましくは1/3o−J
xo oにすることによシ、筒状空間に選択的に反応性
気体を導き入れた。正電極(6日)と基板下端との距離
はガイドの高さを調節して設けた。
Regarding the exhaust system, the gap between the guide C/1 and the lower end of the substrate was set to ICm or less in order to reduce the inflow of reactive gas from the 8th stage and to selectively flush L and (85). That is, the conductance of the gas flow of (8s,
By setting xo o, reactive gas was selectively introduced into the cylindrical space. The distance between the positive electrode (6th day) and the lower end of the substrate was determined by adjusting the height of the guide.

さらに負電極(6))と基板上端即ちディスク(74)
との距離も同様にガイド(70)Kよシ調節した。
Furthermore, the negative electrode (6)) and the upper end of the substrate, that is, the disk (74)
The distance to the guide (70) was adjusted in the same way.

第3図よシ明らかな如く、電極はその外周辺側を石英(
7#イ)”(’i’o)、上フ&(93)、カイ)”(
’71)、下ぶた(94)Icよって囲まれておシ、電
極とチアンバー(%にステンレスチアンバー)の内壁と
の寄生藷の防止に務めた。さらに反応性気体の導入口(
68)の内径と負電極が概略同一の大きさを有し、また
排気口?!■の内径と正電極とが概略同一の大きさを有
するため、高周波放電を行なうと、この筒状空間即ち反
応性気体の被形成面にそって流れて空間を俊丸的にプラ
ズマ放電させている。その結果、反応性気体のプラズマ
化率がきわめて犬きくなシ、ひいては反応容器(ペルジ
ャー)の内壁に過剰の反応生成物がピンホール発生の原
因となるフレーク状に付着してしまうことを防ぐことが
できた。
As is clear from Figure 3, the outer peripheral side of the electrode is made of quartz (
7#i)"('i'o), upper f&(93), chi)"(
'71), the lower lid (94) was surrounded by the Ic to prevent parasitic growth between the electrode and the inner wall of the chamber (mostly stainless steel chamber). In addition, the reactive gas inlet (
The inner diameter of 68) and the negative electrode are approximately the same size, and the exhaust port? ! Since the inner diameter of (2) and the positive electrode are approximately the same size, when high-frequency discharge is performed, it flows along this cylindrical space, that is, the surface on which reactive gas is formed, causing a round-like plasma discharge in the space. There is. As a result, the rate of plasma conversion of the reactive gas is extremely low, which in turn prevents excessive reaction products from adhering to the inner wall of the reaction vessel (Pelger) in the form of flakes, which can cause pinholes. was completed.

以上の如き第3図の構成に加えて、その番号が対応した
第2図においては、赤外線ランプ0―が上方向、下方向
に設けられ、基板の均質化を促進させている。
In addition to the configuration shown in FIG. 3 as described above, in FIG. 2 with corresponding numbers, infrared lamps 0-- are provided in the upper and lower directions to promote homogenization of the substrate.

第3図の構成は第1図における系1.11Kおける反応
容器(6) (8)での電極、基板、ホルダ、反応性気
体導出口、排気口においても同様の構成を有せしめた。
The structure shown in FIG. 3 is similar to the structure shown in FIG. 1 for the electrodes, substrates, holders, reactive gas outlets, and exhaust ports in the reaction vessels (6) and (8) in the 11K system.

かくして第3図において基板および基板ホルダは何らの
支障なくC77)の系■の方向よl) ’iQ ’/、
 Zf−、(78)の方向の系■の方向に移動させるこ
とができた。
Thus, in FIG. 3, the substrate and the substrate holder can be moved in the direction of the system ① of C77) without any hindrance.
It was possible to move it in the direction of the system (2) in the direction of Zf-, (78).

第2図における1GHz以上の周波数のマイクロ波の効
果に関しては、本発明人の出願になる特許願5 ’7−
126047 (S 5)、7.19出願)K詳細が示
されている。
Regarding the effect of microwaves with a frequency of 1 GHz or more in FIG. 2, patent application 5'7- filed by the present inventor
126047 (S 5), filed 7.19) K details are shown.

図面では2500 において3〜t2を高周波電界を2
0Wとしシランを30 c c/9加えると得ることが
できた。a現として従来の平行平板型の電極方式におい
てO01〜1ん今に比べて、同−反応容器浦祐すると6
倍になシ、合計48倍の多量生産が可能となった。また
従来50cmを作製する空間においては、20cmX5
0cmの基板を間隙5cmとし、20配列同時に可能と
なシ、被形成面積は’l  L  Srま( 実質的K 20X50X20−2XIOamと同1tf
K8倍にすることができ、電極間距離は従来の4cmよ
り25〜27cm[なったため、反応性気体のイオン化
率も向上し、被膜へ夫辻4t+シ秒を得ることができる
ため、結果として64倍の成長速度を実質的に有するき
わめて理想的な多量生産方式である°ことがわかった0 かくして形成された半導体層は、プラズマ状態の託ll
tが長いため、光伝導度も2X10−7X10(江坤、
喧伝導度3×10〜1×10(」→を有していた0また
かくして工型半導体層を系■にて約500OAの厚さに
形成させた後、基板は前記した操作に従って系■の反応
容器(8)K移され、N型半導体層が形成された。この
N型半導体層には、第1図においてフオスヒンをPh/
s 1z、1.0%としく31)よυまたシランを(3
0)よシ、マたキャリアガスの水素をQつよ!lls 
1u4/a 、50として供給し系Iと同様にして20
0λの厚さKN型の微結晶性または繊維構造を有する多
結晶の半導体層を形成させたものである。その低反応装
置については系■と同様である。
In the drawing, the high frequency electric field is set to 2500 at 3~t2.
This could be obtained by setting the power to 0W and adding 30 cc/9 silane. a Compared to the current situation where the conventional parallel plate type electrode system has O01~1, when the same reaction vessel Urasuke is used, it is 6
It has become possible to produce a total of 48 times more volume. In addition, in the conventional space for manufacturing 50 cm, 20 cm x 5
0cm substrate with a gap of 5cm, 20 arrays can be arranged simultaneously, the area to be formed is 1tf (substantially the same as K 20X50X20-2XIOam).
The distance between the electrodes is now 25 to 27 cm (compared to the conventional 4 cm), which improves the ionization rate of the reactive gas and allows the film to be heated to 4t + s, resulting in a distance of 64 cm. It has been found that this is an extremely ideal mass production method that substantially doubles the growth rate.
Because t is long, the photoconductivity is also 2X10-7X10 (Ekun,
After forming a semiconductor layer having a conductivity of 3×10 to 1×10 (≈1×10) to a thickness of about 500 OA in the system 2, the substrate was heated in the system 2 according to the operations described above. The reaction vessel (8) was transferred to K, and an N-type semiconductor layer was formed.This N-type semiconductor layer was coated with Phosphin as shown in FIG.
s 1z, 1.0%31), also add silane (3
0) Okay, let's add hydrogen to the carrier gas! lls
1u4/a, 50, and 20 in the same manner as system I.
A polycrystalline semiconductor layer having a KN type microcrystalline or fiber structure with a thickness of 0λ is formed. The low-reaction device is the same as system ①.

かかる工程の後、第2の予備室(9)よシ外にP工N接
合を構成して出された基板上にアルミニューム電極を真
空蒸着法によシ約1μの厚さに作シ、ガラス基板上K 
(ITO+SnO,)表面電極−(P工N半導体)(A
1裏面電極)を構成させた0その光電変換装置としての
特性は7−9チ平均8チを1−00m”の基板でAMx
 (loomW/am)Kて真性効率特性として有し、
/Sイブリッド型にした15cmX40cmの基板にお
いても、トチを真性効率で得ることができた。この効率
の向上は光が入射する側のP工接合がきわめて簡約に構
成され、またアモルファス半導体またはセミアモルファ
ス半導体等の非単結晶半導体においても、P型半導体層
上に工型半導体層を成長積層させたことによるもので、
また開放電圧は0.88−0゜9■であったが、短絡電
流は2 o−22m1y’cm’と大きく、またFFも
O,フ)→、78と大きく、PIN型の半導体層内部に
おける再結合中心の密度が従来の方法に比ベレヘo−v
50になったことによる電流増加が大きな特性改良につ
ながったものと推定される。
After this process, an aluminum electrode is formed to a thickness of about 1 μm by vacuum evaporation on the substrate which is taken out of the second preparatory chamber (9) to form a P-N junction. On glass substrate
(ITO+SnO,) Surface electrode - (P-N semiconductor) (A
Its characteristics as a photoelectric conversion device are as follows: 7-9 chips, average 8 chips, AMx on a 1-00 m” substrate
(roomW/am)K has as an intrinsic efficiency characteristic,
Even on a 15 cm x 40 cm substrate made into a /S hybrid type, conkers could be obtained with intrinsic efficiency. This improvement in efficiency is achieved because the P-type semiconductor layer on the side where the light enters is extremely simple, and even in non-single-crystal semiconductors such as amorphous or semi-amorphous semiconductors, the P-type semiconductor layer is grown and laminated on the P-type semiconductor layer. This is due to the fact that
In addition, the open circuit voltage was 0.88-0°9■, but the short-circuit current was large at 2 o-22 m1y'cm', and the FF was also large at O, F) →, 78, and The density of recombination centers is much lower than that of the conventional method.
It is presumed that the increase in current caused by increasing the current to 50% led to a large improvement in characteristics.

か°くの如く本発明のプラズマ反応装置は形成される半
導体において生産性を30−J′IO倍も向上させ、ま
た特性も従来のトロの変換効率に比べ30%も向上させ
るきわめて独創的なものである。
As described above, the plasma reactor of the present invention is an extremely original device that improves the productivity of formed semiconductors by 30-J'IO times, and also improves the conversion efficiency by 30% compared to the conventional Toro conversion efficiency. It is something.

実施例2 との実施例は実施例1の変形であり、第2図に対応した
図面を第4図(F−示しである。その他は第1図〜第3
図と同様でちる。
Embodiment 2 This embodiment is a modification of Embodiment 1, and the drawing corresponding to FIG. 2 is shown in FIG.
It is similar to the figure.

第4図は工型半導体層を形成する’” 52−’7反応
容器のたて断面図であり、図面において反応性気体ej
’j、n戸は導入口(66)をへて導出口α■]横方向
に噴き出されている。また排出口も(ハ)をへてc26
)よジロータリーポンプeηに至っている。
FIG. 4 is a vertical cross-sectional view of a reaction vessel '52-'7 in which a molded semiconductor layer is formed.
'j, n' are ejected laterally through the inlet (66) and the outlet α■]. In addition, the discharge port also goes through (c) c26
) Yoji rotary pump eη has been reached.

基板(2)は鉛直方向に立てて林立させ、ホルダ(74
)によシ空間に保持されている。反応性気体はガイド(
70)(71) Kよ!ll横型の筒状空間に選択的に
流ノ れるようにしている。高周波電源0υは負電極(67)
正電極(7ツを有し、赤外線ランプはθす、θうと上下
に設けられ、均熱化を促進させた。
The board (2) is placed vertically in a forest, and the holder (74
) is held in space. The reactive gas is guided (
70) (71) K! It is designed to selectively flow into the horizontal cylindrical space. High frequency power supply 0υ is negative electrode (67)
There were seven positive electrodes, and infrared lamps were placed above and below θ, θ, to promote uniform heating.

この実施例においては、基板(2)ホルダ(74)の系
1−1[への移動が容易であるという特性を有する。し
かし反応性気体が温度の上昇気流によシ上方に多く流れ
、基板の上側が厚くなシやすい。このため基板を<10
−(ハ)の方向に配置させることが必要になるが、この
作業が構造上困難であるという欠点を有していた。また
反応性気体の飛翔距離が基板(2)の横方向であシ、長
いため反応性気体の導入口側と排出口側とで得られた電
気特性にバラツキが発生してしまい、多量生産には実施
例1と同様すぐれたものであったが、高品質の特性を大
面積に均質に得るという点では欠点を有していた◇ 実施例3 第5図は本発明の仙の実施例を示す。
This embodiment has the characteristic that it is easy to move the substrate (2) holder (74) to the system 1-1[. However, a large amount of reactive gas flows upward due to the rising air current, and the upper side of the substrate tends to be thick. This makes the substrate <10
It is necessary to arrange it in the -(c) direction, but this work has the disadvantage of being structurally difficult. In addition, since the flight distance of the reactive gas is long in the lateral direction of the substrate (2), variations occur in the electrical characteristics obtained on the reactive gas inlet side and the outlet side, which makes it difficult to mass produce. Although it was as excellent as Example 1, it had a drawback in terms of uniformly obtaining high quality characteristics over a large area ◇ Example 3 Figure 5 shows an example of the present invention. show.

第5図(4)は実施例1の第3図に対応して図面の概要
を示したものである。第5図(A)において反応性気体
の導入口(66)よシθ転負電極(6′Qをへて排気口
な])、正電極(68)、排気系(74)K至るが、基
板(2)はテーパ状を有し、基板の導入口側よシ排気ロ
側に向ってせまくなシ、その形成される膜の均一化をさ
らに促進させたもので、ある。
FIG. 5(4) shows an outline of the drawing corresponding to FIG. 3 of the first embodiment. In FIG. 5(A), from the reactive gas inlet (66) to the θ-converting negative electrode (6'Q to the exhaust port), the positive electrode (68), and the exhaust system (74) K, The substrate (2) has a tapered shape, and is not narrow from the inlet side to the exhaust side of the substrate to further promote uniformity of the formed film.

(4)においてはフレークが被形成面に刺子付着しやす
いため、(B)においては反応性気体の導出口を下方向
よシ(1口を上方向に設けることも可能である。
In (4), the flakes tend to stick to the surface to be formed, so in (B), the outlet for the reactive gas is provided in the downward direction (it is also possible to provide one outlet in the upward direction).

かくすると、フレークが被形成面に付くことがなく、即
ちピンホールによる製造歩留りも向上し、加えて被膜の
膜質も反応性気体の流れ方向において均質な結果を得た
。しかし第1図の製造装置に比べてその生産性は約1/
2になってしまった。
In this way, flakes were not attached to the surface to be formed, that is, the manufacturing yield due to pinholes was improved, and in addition, the film quality of the film was homogeneous in the flow direction of the reactive gas. However, the productivity is about 1/1 compared to the manufacturing equipment shown in Figure 1.
It became 2.

以上の本発明の実施例においては、P工N接合を1つ有
するものとした。しかしP工NIP型のフォトトジンジ
スタ、P工NP工N−・・・P工Nのタンデム構造の光
電変換装置等多くの応用もその半導体層の数に従って反
応容器をさらに連結すればよく、本発明の技術思想匠お
いて、これらも含まれることはいうまでもない。
In the embodiment of the present invention described above, one P-N junction is provided. However, for many applications such as P-type NIP type phototransistors, P-type NIP-type photovoltaic converters, P-type NIP-type photovoltaic conversion devices, etc., it is sufficient to further connect reaction vessels according to the number of semiconductor layers. It goes without saying that these are also included in the technical idea and design of an invention.

本発明において形成される非単結晶半導体被膜中の結晶
構造がアモルファスであれ多結晶であれ、その構造には
制限を受けない。本発明は形成された複数の積層された
半導体被膜がP型、N型または1型を少なくともP−P
NまたはN工接合をひとつ有する半導体であることが重
要である。またこの半導体としての導電特性のリーク特
性の軽減のため、その接合面においてそれぞれを混゛合
させない高品質な被膜を多量生産することが大きな特徴
である。
Regardless of whether the crystal structure in the non-single crystal semiconductor film formed in the present invention is amorphous or polycrystalline, there is no restriction on the structure. The present invention provides that the plurality of laminated semiconductor films formed are P-type, N-type, or type 1, at least P-P.
It is important that the semiconductor has one N or N junction. In addition, in order to reduce the leakage characteristics of the conductive properties of this semiconductor, a major feature is to mass-produce a high-quality coating that does not mix each other at the bonding surface.

さらにこの珪素または炭素の不対結合手を水素によシ日
i−H,hO−E Kて中和するのではなく5i−01
,0−(31と・・ロゲン化物特に塩化i気体を用いて
実施してもよいことはいうまでもなく、この濃度は10
原子チ以下、例えば2−5原子チが好ましかった。
Furthermore, instead of neutralizing the dangling bonds of silicon or carbon with hydrogen, i-H, hO-E K, 5i-01
,0-(31 and... It goes without saying that it may be carried out using chloride gas, especially ichloride gas, and this concentration is 10
Less than atomic atoms, for example 2-5 atoms, were preferred.

形成させる半導体の種類に関しては、実施例−1に示し
たが、■族のSi、Ge、 EliXC,(OイX(1
)、81 XG e t−((0< X (1) 、E
J i X 8 n、−,1(0< X < 1)のみ
でKなく、これ以外にGaAs、 GaALAs、 B
P、 Oas等の′  化合物半導体であってもよいこ
とはいうまでもない0 本発明で形成された炭化珪素被膜に対しフォトエッチ技
術を用いて選択的KPまたはN型の不純物を混入または
拡散してPN接合を部分的に作シ、この接合を利用して
トランジスタ、ダイオード、茶−N−W(Wよりシ擢A
LLOシ(よりFi)構造のP工N接合型の可視光レー
ザ、発光素子または光電変換素子を作ってもよい。特に
先入射光側のエネルギバンド巾を大きくしたヘテロ接合
構造を有するいわゆるW−N(WよりE To NAL
LO司と各反応室にて導電型のみではなく生成物を異な
らせてそれぞれ独立して作製して積層させることが可能
になり、工業的にきわめて重要なものであると信する。
The types of semiconductors to be formed are shown in Example 1.
), 81 XG e t-((0<
J i X 8 n, -, 1 (0<
It goes without saying that a compound semiconductor such as P, Oas, etc. may be used. KP or N-type impurities are selectively mixed or diffused into the silicon carbide film formed by the present invention using a photo-etching technique. partially create a PN junction, and use this junction to create transistors, diodes, and brown-N-W (A from W
A visible light laser, a light emitting element, or a photoelectric conversion element of a P-N junction type having an LLO (more like Fi) structure may be manufactured. In particular, the so-called W-N (E to NAL
We believe that this technology is extremely important industrially, as it makes it possible to independently manufacture and laminate different conductivity types as well as different products in each reaction chamber.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図は本発明を実施するための半導体膜形成
用製造装置の概略を示す0 第3図は第2図の装置の一部の斜視図を示す0第4図は
第2図に対応した本発明の他の実施例である。 第5図は本発明の第3図に対応した他の実施例である。
1 and 2 schematically show a manufacturing apparatus for forming a semiconductor film for carrying out the present invention. FIG. 3 shows a perspective view of a part of the apparatus shown in FIG. 2. 2 is another embodiment of the invention corresponding to the figure; FIG. 5 shows another embodiment corresponding to FIG. 3 of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 1.1気圧以下の減圧状態に保持された反応系における
基板上の被形成面上に、P型、1型およびN型の導電型
の非単結晶半導体層を積層して接合を構成する半導体を
形成せしめるため、P型半導体層を形成させるための反
応容器と、工型半導体層を形成させるための反応容器と
、N型半導体層を形成させるための反応容器とを具備し
、前記それぞれの反応容器には反応性気体の導入系と反
応生成!吻を真空排気するための排気系とを有し、前記
反応容器を互いに連設するとともに、前記反応容器の一
方の側および他方の側に第1および第2の予備室を連設
し、前記反応室および予備室の連設部には前記それぞれ
の反応容器に導入される反応性気体がプラズマ気相反応
中に互いに混入することを防ぐゲート弁が設けられたプ
ラズマ気相反応装置において、被形成面を有する基板が
反応性気体の流れに概略そって配置された筒状の空間に
、前記反応性気体を遠択的に配向すべく、前記反応性気
体Y導入ガイドまたは排気ガイドを有することを特徴と
するプラズマ気相反応装置。 2、特許請求の範囲第1項において、基板の被形成面は
フレーク(微少せつ片)の刺着を防ぐべく、重力にそっ
て配置せられたことを特徴とするプラズマ気相反応装置
A semiconductor in which a junction is formed by laminating non-single crystal semiconductor layers of P type, 1 type and N type conductivity on a surface to be formed on a substrate in a reaction system maintained at a reduced pressure of 1.1 atmospheres or less. In order to form a P-type semiconductor layer, a reaction vessel for forming a P-type semiconductor layer, a reaction vessel for forming a processed semiconductor layer, and a reaction vessel for forming an N-type semiconductor layer are provided. The reaction vessel has a reactive gas introduction system and reaction generation! an exhaust system for evacuating the proboscis, the reaction vessels are connected to each other, and first and second preparatory chambers are connected to one side and the other side of the reaction vessel, In a plasma gas phase reactor, a gate valve is provided in a connecting part between a reaction chamber and a preliminary chamber to prevent reactive gases introduced into each of the reaction vessels from mixing with each other during a plasma gas phase reaction. A substrate having a formation surface has a reactive gas Y introduction guide or an exhaust guide in order to selectively orient the reactive gas in a cylindrical space arranged roughly along the flow of the reactive gas. A plasma gas phase reactor featuring: 2. The plasma vapor phase reaction device according to claim 1, wherein the surface of the substrate on which the substrate is formed is arranged along gravity in order to prevent flakes (microscopic pieces) from sticking to the surface.
JP57163729A 1982-09-20 1982-09-20 Plasma vapor reactor Granted JPS5952834A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP57163729A JPS5952834A (en) 1982-09-20 1982-09-20 Plasma vapor reactor
US06/533,941 US4582720A (en) 1982-09-20 1983-09-20 Method and apparatus for forming non-single-crystal layer
US06/828,790 US4640845A (en) 1982-09-20 1986-02-13 Method and apparatus for forming non-single-crystal layer
US06/828,908 US4642243A (en) 1982-09-20 1986-02-13 Method and apparatus for forming non-single-crystal layer
US07/127,602 US4832981A (en) 1982-09-20 1987-11-30 Method and apparatus for forming non-single crystal layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57163729A JPS5952834A (en) 1982-09-20 1982-09-20 Plasma vapor reactor

Publications (2)

Publication Number Publication Date
JPS5952834A true JPS5952834A (en) 1984-03-27
JPH0436448B2 JPH0436448B2 (en) 1992-06-16

Family

ID=15779550

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57163729A Granted JPS5952834A (en) 1982-09-20 1982-09-20 Plasma vapor reactor

Country Status (1)

Country Link
JP (1) JPS5952834A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61232612A (en) * 1985-04-08 1986-10-16 Semiconductor Energy Lab Co Ltd Gaseous phase reaction device
US5188672A (en) * 1990-06-28 1993-02-23 Applied Materials, Inc. Reduction of particulate contaminants in chemical-vapor-deposition apparatus
US5512102A (en) * 1985-10-14 1996-04-30 Semiconductor Energy Laboratory Co., Ltd. Microwave enhanced CVD system under magnetic field

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61232612A (en) * 1985-04-08 1986-10-16 Semiconductor Energy Lab Co Ltd Gaseous phase reaction device
US5512102A (en) * 1985-10-14 1996-04-30 Semiconductor Energy Laboratory Co., Ltd. Microwave enhanced CVD system under magnetic field
US5188672A (en) * 1990-06-28 1993-02-23 Applied Materials, Inc. Reduction of particulate contaminants in chemical-vapor-deposition apparatus
US5322567A (en) * 1990-06-28 1994-06-21 Applied Materials, Inc. Particulate reduction baffle with wafer catcher for chemical-vapor-deposition apparatus
US5397596A (en) * 1990-06-28 1995-03-14 Applied Materials, Inc. Method of reducing particulate contaminants in a chemical-vapor-deposition system

Also Published As

Publication number Publication date
JPH0436448B2 (en) 1992-06-16

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