JPS5952827A - Method of forming electrodes of laminated ceramic condenser - Google Patents
Method of forming electrodes of laminated ceramic condenserInfo
- Publication number
- JPS5952827A JPS5952827A JP57164641A JP16464182A JPS5952827A JP S5952827 A JPS5952827 A JP S5952827A JP 57164641 A JP57164641 A JP 57164641A JP 16464182 A JP16464182 A JP 16464182A JP S5952827 A JPS5952827 A JP S5952827A
- Authority
- JP
- Japan
- Prior art keywords
- plating
- electroless
- multilayer ceramic
- electrode
- forming electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、積層セラミックコンデ／すの端子電極（外部
電極）を形成する積層セラミックコンデンサの電極形成
方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for forming an electrode of a multilayer ceramic capacitor, which forms a terminal electrode (external electrode) of the multilayer ceramic capacitor.
従来例の構成とその問題点
従来、積層セラミックコンデンサの端子電極には、Ａｑ
−Ｐｄ電極を用いたもの、また半田耐熱性および半田
付は性を考慮したＡｑ電極形成後、電解メッキによりＮ
ｉ および５ｎ−ＰｂをメッキしたものかＬ般的であ
った。しかし、Ａｑ −Ｐｄ電極ではＰｄが２０〜３０
ｗｔ ％含有されコスト高であり、半田耐熱性を問題
にする場合には不安がつきまとうものであった。一方、
電解メッキによる方法では均一なメッキ厚を得ることが
難しく、電気特性の中でＱ不良が発生するものであった
。Conventional structure and its problems Conventionally, the terminal electrodes of multilayer ceramic capacitors have Aq
-Those using Pd electrodes, and after forming Aq electrodes considering soldering heat resistance and soldering properties, N is applied by electrolytic plating.
I and 5n-Pb plated materials were common. However, in the Aq-Pd electrode, Pd is 20-30
wt %, which is costly, and there is concern when soldering heat resistance is an issue. on the other hand,
In the electrolytic plating method, it is difficult to obtain a uniform plating thickness, and Q defects occur in electrical characteristics.
発明の目的
本発明は上記のような欠点に鑑み、メッキ処理を前提と
してＱ不良を改善しようとする積層セラミックコンデン
サの電極形成方法を提供することを目的とする。OBJECTS OF THE INVENTION In view of the above-mentioned drawbacks, it is an object of the present invention to provide a method for forming electrodes of a multilayer ceramic capacitor, which attempts to improve Q defects on the premise of plating treatment.
発明の構成
そこでこの目的を達成するために本発明の積層セラミッ
クコンデンサの電極形成方法は、Ａｑ電極を塗布、焼付
は後、無電解Ｐｄ メ・ツキして活性化し、その後無電
解Ｎｉ メッキを行って置換した後、無電解まだは電
解による３１１ メッキか５ｎ−Ｐｂメッキを行うもの
であり、Ｑ不良の発生率を０にすることができるもので
ある０
実施例の説明
以下、本発明の一実施例について図面を参照して説明す
る。まず、酸化チタン系材料を用いて得られた第１図で
示される積層セラミックコンデンサ素子１の端部に外部
電極としてＡｑ電極を塗布し、８００℃−２０分で焼付
ける。第１図で２は内部電極である。次に、このコンデ
ンサ素子１に無電解Ｐｄ メッキして活性化し、その後
無電解１”Ｊｉメッキを行って置換する。次に、このＮ
ｔ メッキ層の上に無電解Ｓｎ メッキまたは５ｎ−
Ｐｂメッキを実施して製造は終了する。ここで、 Ｓｎ
メッキの前に無電解Ｃｕ メッキを行い、これを
Ｓｎ メッキで置換してもよい。また、無電解Ｓｎ
メッキまたはＳｎ −Ｐｂメッキの代りに電解Ｓｎ メ
ッキまたはＳｎ −Ｐｂメッキを実施してもよいもので
ある。Structure of the Invention In order to achieve this object, the method for forming electrodes of a multilayer ceramic capacitor of the present invention involves applying an Aq electrode, baking it, activating it by plating it with electroless Pd, and then plating it with electroless Ni. After the replacement, electroless or electrolytic 311 plating or 5n-Pb plating is performed, and the incidence of Q defects can be reduced to 0. Examples will be described with reference to the drawings. First, an Aq electrode is applied as an external electrode to the end of the multilayer ceramic capacitor element 1 shown in FIG. 1 obtained using a titanium oxide material, and baked at 800 DEG C. for 20 minutes. In FIG. 1, 2 is an internal electrode. Next, electroless Pd plating is applied to this capacitor element 1 to activate it, and then electroless 1"Ji plating is performed to replace it. Next, this N
t Electroless Sn plating or 5n- on the plating layer
Manufacturing is completed by Pb plating. Here, Sn
Electroless Cu plating may be performed before plating, and this may be replaced with Sn plating. In addition, electroless Sn
Electrolytic Sn plating or Sn--Pb plating may be used instead of plating or Sn--Pb plating.
第２図はこのようにして得られた積層セラミックコンデ
ンサを示しており、３はＡｑ電極、４はＮｉ メッキ
層、５はＳｎまたはＳｎ −Ｐｂメッキ層である。FIG. 2 shows the multilayer ceramic capacitor thus obtained, in which 3 is an Aq electrode, 4 is a Ni plating layer, and 5 is a Sn or Sn--Pb plating layer.
この本発明の方法で得られたものと従来の電解メッキで
得られたものとのＱの測定結果は、従来のものでＱ不良
発生数が３／１０００（個）であったものが、本発明方
法によるものでは○／１０００（個）となった。また、
測定した本発明方法による試料の無電解メッキ厚みは、
Ｎ’ｉ メッキが平均３μｍ 、 Ｓｎ メッキは
平均１．２μｍであり、半田耐熱性および半田付は性も
従来の電解メッキによるものと同様で良好であった０な
お、Ｑ不良発生メカニズムは現在詳細に検討中であるが
、電解メッキ時に電解をかけた際に、内部電極と外部電
極との界面にＡｑ電極中を通過し浸透したメッキ液成分
が析出するものと考えられる０
発明の効果
以上のように本発明の方法によれば、半田耐熱性および
半田付は性を低下させることなく、Ｑ不良発生率を０に
することができ、産業上非常に有効なものである。The Q measurement results for those obtained by the method of the present invention and those obtained by conventional electrolytic plating show that the number of Q defects in the conventional method was 3/1000 (pieces), but the number of Q defects in the conventional method was 3/1000 (pieces). In the case of the method according to the invention, the number was ○/1000 (pieces). Also,
The electroless plating thickness of the sample measured by the method of the present invention is:
The average thickness of the N'i plating was 3 μm, and the average thickness of the Sn plating was 1.2 μm, and the solder heat resistance and solderability were good as well, as with conventional electrolytic plating. However, it is thought that when electrolytic plating is applied during electrolytic plating, the components of the plating solution that have passed through the Aq electrode and permeated are deposited at the interface between the internal and external electrodes. According to the method of the present invention, the Q defect rate can be reduced to 0 without deteriorating soldering heat resistance and soldering properties, and is very effective industrially.
第１図は本発明の詳細な説明するだめの積層セラミック
コンデンサ素子の断面図、第２図は本発明方法により得
られた積層セラミックコンデンサの断面図である。
１・・・・・・積層セラミックコンデンサ素子、３・・
・・・・Ａｑ電極、４・・・・・・Ｎｉ メッキ層、
５・・・・・・Ｓｎまたは５ｎ−Ｐｂメッキ層。
代理人の氏名 弁理士 中 尾 敏 男 はが１名第１
図
第２図FIG. 1 is a cross-sectional view of a multilayer ceramic capacitor element for which the present invention will not be explained in detail, and FIG. 2 is a cross-sectional view of a multilayer ceramic capacitor obtained by the method of the present invention. 1... Multilayer ceramic capacitor element, 3...
...Aq electrode, 4...Ni plating layer,
5...Sn or 5n-Pb plating layer. Name of agent: Patent attorney Toshio Nakao (1st person)
Figure 2
Claims (1)
し、焼付けた後、無電解Ｐｄ メッキして活性化し、そ
の後無電解Ｎｉ メッキを行って置換した後、無電解
または電解によるＳｎ メッキか５ｎ−ｐｂ メッキを
行うことを特徴とする積層セラミックコンデンサの電極
形成方法。After applying an Aq electrode to the end of a multilayer ceramic capacitor element and baking it, it is activated by electroless Pd plating, then replaced by electroless Ni plating, and then electroless or electrolytic Sn plating or 5n-pb. A method for forming electrodes of a multilayer ceramic capacitor, characterized by plating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57164641A JPS5952827A (en) | 1982-09-20 | 1982-09-20 | Method of forming electrodes of laminated ceramic condenser |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57164641A JPS5952827A (en) | 1982-09-20 | 1982-09-20 | Method of forming electrodes of laminated ceramic condenser |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5952827A true JPS5952827A (en) | 1984-03-27 |
Family
ID=15797043
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57164641A Pending JPS5952827A (en) | 1982-09-20 | 1982-09-20 | Method of forming electrodes of laminated ceramic condenser |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5952827A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62101014A (en) * | 1985-10-28 | 1987-05-11 | 株式会社村田製作所 | Ceramic capacitor |
| JP2013084875A (en) * | 2011-10-06 | 2013-05-09 | Samsung Electro-Mechanics Co Ltd | Multilayer ceramic capacitor and method for manufacturing the same |
| JP2020061468A (en) * | 2018-10-10 | 2020-04-16 | 株式会社村田製作所 | Multilayer ceramic electronic component and mounting structure thereof |
-
1982
- 1982-09-20 JP JP57164641A patent/JPS5952827A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62101014A (en) * | 1985-10-28 | 1987-05-11 | 株式会社村田製作所 | Ceramic capacitor |
| JPH055367B2 (en) * | 1985-10-28 | 1993-01-22 | Murata Manufacturing Co | |
| JP2013084875A (en) * | 2011-10-06 | 2013-05-09 | Samsung Electro-Mechanics Co Ltd | Multilayer ceramic capacitor and method for manufacturing the same |
| JP2017163168A (en) * | 2011-10-06 | 2017-09-14 | サムソン エレクトロ−メカニックス カンパニーリミテッド． | Multilayer ceramic capacitor and method for manufacturing the same |
| JP2020061468A (en) * | 2018-10-10 | 2020-04-16 | 株式会社村田製作所 | Multilayer ceramic electronic component and mounting structure thereof |
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