JPS5949622A - Access system of input and output device - Google Patents

Abstract

PURPOSE:To store more information and to allow CPU's access without increasing the number of signal lines by proving a module internally with storage holding parts more than write or read signal lines connected to a CPU. CONSTITUTION:Storage holding parts 16 and 17 are stored with write signals and also output their contents by being brought under read control. For the output, module selection signal lines 22 and 23 are used for one module. One of those two signal lines is used for a selection signal for the data writing and reading of the holding parts 16 and 17 and the other is used for the selection signal for a control part 24 which controls the storage holding parts. Consequently, the less signal lines allows an unshown CPU to access the input/output device having the holding parts A and B.

Description

DETAILED DESCRIPTION OF THE INVENTION [Use of the Invention] Yuno The present invention relates to an access method for an input/output control device that has been converted into monoyl.

[Prior art]

The input/output device in the programmable controller system is small, 1ljl IJi, and the circuit density is high, so it is generally monoyl + f4 dragon, and it can be used at different times if necessary. By adding monoyl with 60% strength, etc.
We are working to expand the number of functions to 11.

Figure 811 is the remaining 1st map of the input/output monocle board, and 1
1 is the front plate, 12 is the number of times I cut a few lines on it h1
11! The mounting board 13 indicates a connector part 5 which can be inserted into a female connector of the main body of the apparatus (not shown), and in reality, a large number of input/output monocle plates are arranged side by side.

Figure 2 shows the internal circuit i:? of the input/output monocle board 1. 5tf
It shows the Y configuration, 2 is the signal line group including data I 11 drawn from the plug part 13, 3 is the memory storage part, and 4 is the digit 1: I; it can be connected to the holding Hf1+3. Data read signal line 11゛C25 Strobe line 1d, 6
7 is the selection signal line of the IR beam that is input to select the input/output monocle board for VJ.
t*, a control system 6111 section, and has a write synchronization signal line 8 and a bladder control synchronization signal line 9 between it and the memory holding section 3. Note 1 above has a flip-flop with three holding parts, but it is not possible to input new data into the flip-flop or read it. It fulfills its ta function. Figures 3 and 4
I will explain the 100 works according to the diagram.

In the case of a write operation, a central control unit (hereinafter abbreviated as CPU), not shown, sends the selection signal 1 to the selection signal line 6-, as shown in FIG. The received strobe signal is read by the reading p control unit 7 with 1 degree inclination as shown in Fig. 3 (b).
), and sends it to the writing synchronization 1d No. 8, and at the rising end of this writing synchronization signal, the new ht writing signal group fC) that has been sent to the transfer group 2 after writing 1. Write 1 and put 1 into the holding section 3. That is, in Note 1, the output signal (d) of the holding unit 3 is an old output signal group for a time tn, but it is one time t. -1-1, a new signal group is rewritten and updated.

In the case of a read operation, similarly, the CPU (not shown) selects a selection signal, 1.
! iI6 is input to the i seat number control section 7 to form a read signal (+)). As a result, the date provided at the output section of the memory holding section 3 is opened, and the read signal group IC) is read out.
The signal is sent to the N signal line group 4.

As mentioned above, in the conventional technology, the number of fritsuno flops constituting the memory holding section 3 is equal to the number of signal lines! Only the number of seams or reading 1d number a equal to the number of seams is installed in the monoyl. However, there were drawbacks such as the large and sharp edges of the device, requiring a large installation space, and the cost being high.

[Purpose of the invention]

The present invention addresses the above-mentioned drawbacks and is considered to be 2+: the number of lead-in 1d lines connected to 0 yen 1 in the noyule, 1> Rui ri
ItA! The purpose is to have a memory storage unit that is larger than the number of signal lines, so that a large number of IF information can be stored in the memory, and to be accessible to the CPU using the existing number of signal lines.

[Summary of the invention]

In the present invention, the monoyl selection signal is time-divided into two parts, a selection signal for the holding section and a selection signal for the control section, and then sent from the CPU to the input/output monoyl. The number is distinguished by a program, and many memory holding parts are provided in the monoyl.

[Embodiments of the invention]

The present invention will be described in detail below with reference to FIGS. 5 to 9.

FIG. 5 is an input/output monoyl block (117 diagram) showing an embodiment of the present invention, and in order to facilitate fi+2 clarity, the memory holding section is set to A group and 0 group, and the memory storage section is divided into two groups, which is twice as large as the conventional one. In this figure, the parts with the same reference numerals as those in Fig. 2 have the same functions. A first memory holding unit 16 and a second memory holding unit 17 that output the contents by being controlled,
- Control unit selection signal line 22 from the CPU that is not connected. Memory holding unit selection signal 23 and strobe signal 1. It has a H7lJjll1 section 24 that outputs a write synchronization number 16 and a read signal to the second memory holding section. 18 to 21 indicate the signal lines.

Figure 6 shows the write and read access operations in the input/output monolayer of the two-group Htt structure as shown in Figures 1 and 6.

This will be explained according to FIG.

'11' included, 71-! In order to input the true data into the place memory storage section of the 1111 work, the time tA shown in Fig. 6 must be met.
Suppose that BMllI11 of I and tIll are made and J is made. This also applies to the program flrlJ, which also has a winding mechanism that controls input and output monomers as described later.

At time tA, fill 1m41 part senzawa signal line 22
-1: 46 Figure 1a), J't1 full signal, and at the same time, 1g line group 2-1, control 111 section 24, 1° These data are temporarily stored in the feed control section 24 at the rising edge of the write synchronization signal 1cJ. This temporarily stored 'IC' and various data are decoded, and if the corresponding note 1 is the holding unit 16, then the 61'l (L+3 synchronization signal line 114) (υJ times signal input) L.

An eyebrow is raised. -Tch, that's the second memory storage unit 1.
If it is 7, a synchronization signal is input via the fi1 signal line 18, and 1 is added.

- Also, during the period of 1 hour La, the memory holding section is selected by outputting a memory holding BIS selection signal to the bus line 23''2, and at the same time outputting a strobe signal to the strobe signal line 5''2, This memory storage unit 1
Insertion of various data into 6 and 17 can be achieved by opening the corresponding 11-input synchronization signal fJjO gate during the time period tAl. At time ti11, past data is accumulated at time tn, and at time Ln+1, new data is updated by one period at the rising edge of the synchronization signal (C). Here, the waveform shown in FIG. Note 1 indicates the holding output signal.

As in the case of the U-input operation described above, the time shown in FIG. Lateral position (there is a winding that does 1).

In the period of time tA2, feeding control 1st division 1F < 1 Paris 1 Jil
Sends 1ljlBu BIS selection signal (a) on 22, and connects this and the circuit with 1 word 4Ii! 2. Output the write signal shown in Figure 7 +d) above, and set each to tlill.
11t11 part 24, and at the end of the 911-included synchronization bow shown in FIG. This temporary memory is 71. Taiii! i data is there II
I# read Jt, the corresponding note 1 is held in the holding section 16' or 1
7 and Φ to open the gate of signal line 19 or 17J::41.

Therefore, at time tB2, 1. When the low holding part selection (N bow 1 gland 23) and the holding output signal 141 in FIG.
Line d line 4 was set in the open state and the output signal of the holding unit was read.
Appears on the ground.

In other words, a single input/output monolayer has memory holding sections for two groups, and the number of signal lines can be changed to the same as the existing ones.

FIG. 8 shows the diagonal guide 1 of the circuit board incorporating the Okawa Camo Yule shown in FIG. 5, and 25 is the mark shown in FIG.
l + 1v part 1fi, +7 circuit printed board, 26
is also the circuit printing part of the control unit 21, (temporary, 27, 2
8 is each connection part,! ! I Vi circuit printed board 25
, ', 6 is attached to the surface 1ν, 30 is A+ for circuit:
11: Indicates a signal cable connecting between bar plate 25 + 2ti. By configuring as shown in FIG.
The selection signal of lil1 and both parts 2-1 is the conventional monoyl selection number boiled N, and the selection signal of the holding part of Npi1 is
Conventional monoyuruyu “pe selection number q) 16 N +1 to 1
It has been used historically to achieve its purpose.

FIG. 9 specifically shows the connections tM IJv, and the same reference numerals as in FIG. 5, r', and FIG. 8 indicate the same components. Also, write,
Since the reading control method is exactly the same as that shown in fff2 in FIG. 5, hiL is omitted here.

- As shown in Mi2 in the Tue/J11 example mentioned above, it is possible to obtain a new input/output monolayer with new functions without modifying the existing main unit such as adding cables, and the memory retention li1. can be increased.

〔Effect of the invention〕

As is clear from the above explanation, the access method of the input/output device according to the present invention allows many 1n messages to be transmitted from one to the other without increasing the number of IHp4 lines connected to the CPII. I can do it,
CPU access is also possible.

[Brief explanation of the drawing]

FIG. 1 is a schematic perspective view of a conventional input/output module. Figure 2 is a block diagram of the circuit, Figures 3 and 4 are time charts for explaining write and read operations in the circuit of Figure 2, and Figure 5 is an input/output monolayer according to the present invention. A circuit block diagram explaining the access method of
FIGS. 6 and 7 are time charts for explaining the f6 and gun-picking operations in the circuit shown in FIG.
FIG. 8119 is a specific circuit block diagram of FIG. 1...Input/output monoule, 2...Indentation/correction &:i
#i! Group, 4... Read signal line group, 5... Strobe signal line, 16. 17...Memory holding unit, 18.20...Write synchronization 1
Line d, 19. 21... Read signal line, 22... Control 01l1 section selection signal line, 23... Memory holding section selection signal line, 24...
Control unit, 25...Memory holding unit circuit printed board, Redundancy...
Part 1 printed circuit board, 27°...connection part, 29.
...Surface plate, blade...Signal cable. Agent Patent Attorney Tadashi Akimoto Tue Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 = 137 Figure 8

Claims (1)

[Claims] In monoyl conversion, data H[;1 is an input/output 1lfllφ having a holding section (in the access method of one device, a plurality of different monoyl selection lines 1g are used as one monoyl selection signal line, and one of them is When selecting one of the monoyls, the line is used as a selection signal line for the memory holding section data pull-in and cotton collecting section, and another selection signal line is used as the S selection signal of the 1d11 section for controlling the memory holding section. 4-% that one signal line is used as a signal line, and that access to an input/output device having a data storage unit of a large number of lines is performed using a small number of signal lines.
The access method of the input 111 input device.