JPS5948138U - Noise removal circuit - Google Patents

Noise removal circuit

Info

Publication number
JPS5948138U
JPS5948138U JP14328282U JP14328282U JPS5948138U JP S5948138 U JPS5948138 U JP S5948138U JP 14328282 U JP14328282 U JP 14328282U JP 14328282 U JP14328282 U JP 14328282U JP S5948138 U JPS5948138 U JP S5948138U
Authority
JP
Japan
Prior art keywords
noise removal
removal circuit
circuit
input signal
pass filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14328282U
Other languages
Japanese (ja)
Inventor
美志夫 林
Original Assignee
株式会社アドバンテスト
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社アドバンテスト filed Critical 株式会社アドバンテスト
Priority to JP14328282U priority Critical patent/JPS5948138U/en
Publication of JPS5948138U publication Critical patent/JPS5948138U/en
Pending legal-status Critical Current

Links

Landscapes

  • Measuring Frequencies, Analyzing Spectra (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来の雑音除去回路を説明するための接続図、
第２図は従来の雑音除去回路の動作を説明するための波
形図、第３図は雑音除去回路の動作を説明するための特
性曲線図、第４図はこの考案の一実施例を示す接続図で
ある。 １０２：振幅制限回路、１０３：インピーダンス変換部
、１０５：波形整形部、４０２：能動形低域通過フィル
タ。 １０２　　　　　＋Ｖ　　　　１０４ ２０１ ！ 一一場一１１ｔ−）−１２１）Figure 1 is a connection diagram for explaining a conventional noise removal circuit.
Fig. 2 is a waveform diagram for explaining the operation of a conventional noise removal circuit, Fig. 3 is a characteristic curve diagram for explaining the operation of the noise removal circuit, and Fig. 4 is a connection diagram showing an embodiment of this invention. It is a diagram. 102: amplitude limiting circuit, 103: impedance conversion section, 105: waveform shaping section, 402: active low-pass filter. 102 +V 104 201! 11t-)-121)

Claims (1)

【実用新案登録請求の範囲】 Ａ　入力信号の振幅を制限する振幅制限回路と、Ｂ　入
力信号に重畳する高周波ノイズを除去するための利得が
１より大きい能動形低域通過フィルタと、 Ｃこの低域通過フィルタの出力及び上記振幅制限回路の
出力の何れか一方が入力されて矩形波に変換する波形整
形回路と、 から成る雑音除去回路。[Claims for Utility Model Registration] A. An amplitude limiting circuit that limits the amplitude of an input signal; B. An active low-pass filter with a gain greater than 1 for removing high-frequency noise superimposed on the input signal; C. A noise removal circuit comprising: a waveform shaping circuit which receives either the output of the pass-pass filter or the output of the amplitude limiting circuit and converts it into a rectangular wave;
JP14328282U 1982-09-20 1982-09-20 Noise removal circuit Pending JPS5948138U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14328282U JPS5948138U (en) 1982-09-20 1982-09-20 Noise removal circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14328282U JPS5948138U (en) 1982-09-20 1982-09-20 Noise removal circuit

Publications (1)

Publication Number Publication Date
JPS5948138U true JPS5948138U (en) 1984-03-30

Family

ID=30319874

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14328282U Pending JPS5948138U (en) 1982-09-20 1982-09-20 Noise removal circuit

Country Status (1)

Country Link
JP (1) JPS5948138U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51858A (en) * 1974-06-20 1976-01-07 Matsushita Electric Ind Co Ltd KONPAREE TAKAIRO
JPS5241318U (en) * 1975-09-19 1977-03-24

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51858A (en) * 1974-06-20 1976-01-07 Matsushita Electric Ind Co Ltd KONPAREE TAKAIRO
JPS5241318U (en) * 1975-09-19 1977-03-24

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