JPS60177540U - video noise reduction circuit - Google Patents
video noise reduction circuitInfo
- Publication number
- JPS60177540U JPS60177540U JP6377284U JP6377284U JPS60177540U JP S60177540 U JPS60177540 U JP S60177540U JP 6377284 U JP6377284 U JP 6377284U JP 6377284 U JP6377284 U JP 6377284U JP S60177540 U JPS60177540 U JP S60177540U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- noise reduction
- video signal
- output
- video noise
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Picture Signal Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、この考案のビデオノイズリダクション回路の
一実施例を示す回路図、第２図は、従来のビデオノイズ
リダクション回路の一例を示す回路図である。
２・・・・・・差動アンプ、３・・・・・・高域濾波回
路、３ａ・・・・・・ゲイン設定回路、４・・・・・・
リミッタ回路、１１・・・・・ビデオノイズリダクショ
ン回路、１２・・・・・加算器、１３・・・・・・高域
濾波回路、１３ａ・・・・・・ゲイン設定回路。FIG. 1 is a circuit diagram showing an embodiment of the video noise reduction circuit of this invention, and FIG. 2 is a circuit diagram showing an example of a conventional video noise reduction circuit. 2... Differential amplifier, 3... High-pass filter circuit, 3a... Gain setting circuit, 4...
Limiter circuit, 11...Video noise reduction circuit, 12...Adder, 13...High-pass filter circuit, 13a...Gain setting circuit.
Claims (1)
端子には、前記入力ビデオ信号からろ波した高域成分が
リミッタ回路による振幅制限後供給される差動アンプ回
路と、この差動アンプ回路の出力である出力ビデオ信号
から高域成分を炉径する高域−波回路と、この高域−波
回路の出力を前記リミッタ回路の入力に加算する加算器
とから構成してなるビデオノイズリダクション回路。a differential amplifier circuit to which an input video signal is supplied to a non-inverting input terminal, and a high-frequency component filtered from the input video signal is supplied to the inverting input terminal after amplitude limitation by a limiter circuit; A video noise reduction device comprising: a high-frequency wave circuit that removes high-frequency components from an output video signal that is the output of the circuit; and an adder that adds the output of the high-frequency wave circuit to the input of the limiter circuit. circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6377284U JPS60177540U (en) | 1984-04-30 | 1984-04-30 | video noise reduction circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6377284U JPS60177540U (en) | 1984-04-30 | 1984-04-30 | video noise reduction circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60177540U true JPS60177540U (en) | 1985-11-26 |
Family
ID=30594236
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6377284U Pending JPS60177540U (en) | 1984-04-30 | 1984-04-30 | video noise reduction circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60177540U (en) |
-
1984
- 1984-04-30 JP JP6377284U patent/JPS60177540U/en active Pending
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