JPS5869322U - amplifier circuit - Google Patents

amplifier circuit

Info

Publication number
JPS5869322U
JPS5869322U JP16270281U JP16270281U JPS5869322U JP S5869322 U JPS5869322 U JP S5869322U JP 16270281 U JP16270281 U JP 16270281U JP 16270281 U JP16270281 U JP 16270281U JP S5869322 U JPS5869322 U JP S5869322U
Authority
JP
Japan
Prior art keywords
amplifier circuit
amplifier
video signal
stage
frequency component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16270281U
Other languages
Japanese (ja)
Inventor
阿部 薫夫
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP16270281U priority Critical patent/JPS5869322U/en
Publication of JPS5869322U publication Critical patent/JPS5869322U/en
Pending legal-status Critical Current

Links

Landscapes

  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の多段増幅回路のブロック図、第2図は入
力ビデオ信号の波形図、第3図は第2図の入力ビデオ信
号をエンファシスした波形図、第4図は本考案の増幅回
路の一実施例のブロック図、第5図は第4図の高周波成
分の波形図である。 図中符号4は入力端子、5は出力端子、6は主   −
信号系路、7は副信号系路、8は混合器、9はFM変調
器である。
Figure 1 is a block diagram of a conventional multi-stage amplifier circuit, Figure 2 is a waveform diagram of an input video signal, Figure 3 is a waveform diagram with emphasis on the input video signal of Figure 2, and Figure 4 is an amplifier circuit of the present invention. FIG. 5 is a block diagram of one embodiment of the present invention, and FIG. 5 is a waveform diagram of the high frequency component of FIG. In the figure, 4 is the input terminal, 5 is the output terminal, and 6 is the main −
A signal path, 7 is a sub-signal path, 8 is a mixer, and 9 is an FM modulator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力されたビデオ信号の高域成分をエンファシスして出
力する多段直結した増幅器において、前記ビデオ信号を
該ビデオ信号帯域内で平坦な周波数特性で増幅する第1
の多投直結増幅回路と、ハ、  イパスフィルタを通過
した前記ビデオ信号の高域成分を増幅する第2の多段増
幅回路とを具備し、前記第1の多段増幅器と前記第2の
多段増幅器の夫々の出力信号を混合し前記高域成分をエ
ンファシスして出力するよう構成したことを特徴とする
増幅回路。
In a multi-stage directly connected amplifier that emphasizes and outputs a high-frequency component of an input video signal, a first amplifier that amplifies the video signal with flat frequency characteristics within the video signal band.
a multi-throw direct-coupled amplifier circuit; and c. a second multi-stage amplifier circuit for amplifying the high-frequency component of the video signal that has passed through the i-pass filter, the first multi-stage amplifier and the second multi-stage amplifier An amplifier circuit characterized in that the amplifier circuit is configured to mix the respective output signals and output the high frequency components with emphasis.
JP16270281U 1981-11-02 1981-11-02 amplifier circuit Pending JPS5869322U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16270281U JPS5869322U (en) 1981-11-02 1981-11-02 amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16270281U JPS5869322U (en) 1981-11-02 1981-11-02 amplifier circuit

Publications (1)

Publication Number Publication Date
JPS5869322U true JPS5869322U (en) 1983-05-11

Family

ID=29955010

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16270281U Pending JPS5869322U (en) 1981-11-02 1981-11-02 amplifier circuit

Country Status (1)

Country Link
JP (1) JPS5869322U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5242515A (en) * 1975-09-30 1977-04-02 Kunimasa Ooide Method of reinforcing edge groove of gypsum plaster boards
JPS5333611A (en) * 1976-09-10 1978-03-29 Sony Corp Processing circuit for video signal

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5242515A (en) * 1975-09-30 1977-04-02 Kunimasa Ooide Method of reinforcing edge groove of gypsum plaster boards
JPS5333611A (en) * 1976-09-10 1978-03-29 Sony Corp Processing circuit for video signal

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