JPS5946868A - Non-destructive inspection of semiconductor device - Google Patents
Non-destructive inspection of semiconductor deviceInfo
- Publication number
- JPS5946868A JPS5946868A JP57156659A JP15665982A JPS5946868A JP S5946868 A JPS5946868 A JP S5946868A JP 57156659 A JP57156659 A JP 57156659A JP 15665982 A JP15665982 A JP 15665982A JP S5946868 A JPS5946868 A JP S5946868A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- high frequency
- leads
- electrodes
- inspection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置の異なる温度条件における非破壊検
査法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for non-destructive testing of semiconductor devices under different temperature conditions.
トランジスタやIC(半導体集積回路)等の半導体装置
の非破壊選別検査(スクリーニングと呼ばれる)の方法
としては、(1)温度サイクル、(2)高温放置、(3
)低温放置とが現在性われている。これらのうち(1)
温度サイクルは、温度の異なるいくつかの恒温槽に検査
される素子を交互に入れ、例えば−55Cの低温で30
分、常温で10分、150Cの高温で30分保持するこ
とを5〜10サイクルで変化させて、半導体素子の電気
的特性や断線等の欠陥の検査をするものであるが、スク
リーニングの条件によって、欠陥発見内容が異なってく
る。(2)の高温放置は150C以上の最高温で1時間
及至5時間放置するものであシ、時間が多くがかること
が難点で、かつ自動化が困難である。(3)の低温放置
は一55C以下の最低温で同じく1時間及至5時間放置
するものであるため、設備が大型化し費用が多くか\る
ために通當の検査工程に取シ入れることは困難である。Methods for non-destructive screening (called screening) of semiconductor devices such as transistors and ICs (semiconductor integrated circuits) include (1) temperature cycling, (2) high temperature storage, and (3)
) At present, it is possible to leave it at a low temperature. Among these (1)
In the temperature cycle, the elements to be tested are placed alternately in several constant temperature baths with different temperatures, for example, at a low temperature of -55C for 30 minutes.
It is used to inspect the electrical characteristics of semiconductor devices and defects such as disconnections by changing the temperature for 10 minutes at room temperature and 30 minutes at a high temperature of 150C for 5 to 10 cycles, depending on the screening conditions. , the content of defects discovered differs. (2) High-temperature leaving requires leaving at a maximum temperature of 150 C or higher for 1 to 5 hours, which is difficult to take and is difficult to automate. (3) Low-temperature storage involves leaving the product at the lowest temperature of -55C or less for 1 to 5 hours, so it cannot be incorporated into the regular inspection process because the equipment is large and the cost is high. Have difficulty.
このように従来のスクリーニングでは時間と費用がか\
るとともにライン生産した場合に検査の自動化が難しい
。特にディジタルICの場合、樹脂モールド工程中又は
、その後にボンディングワイヤの牛断線不良が多発し7
、従来の温度サイクルのみでは検査能力に限界があった
。In this way, traditional screening is time-consuming and costly.
In addition, it is difficult to automate inspection when produced on a line. Particularly in the case of digital ICs, bonding wire breakage failures occur frequently during or after the resin molding process.
However, conventional temperature cycling alone has limited testing ability.
本発明は上記した問題を解決するためになされたもので
ある。したがって本発明の一つの目的はスクリーニング
時間を短縮して検査効率を高めることにあシ、他の目的
は簡単な設備で検査費用を節減することにある。The present invention has been made to solve the above-mentioned problems. Therefore, one objective of the present invention is to shorten screening time and increase testing efficiency, and another objective is to reduce testing costs with simple equipment.
以下実施例にそって、本発明を詳述する。The present invention will be described in detail below with reference to Examples.
本発明による一つの実施態様は、第1図に示されるよう
に半導体素子(Stチップ)1の表面に形成されたAA
よシなる電極2に対してAu又はAnのワイヤ3の一端
をボンディング(接続)し、このワイヤの他端をCu等
からなる外部リード4に接続した上をレジン(合成樹脂
)モールド体5によシ封止し、リード4の一部をレジン
の外部に露出して成る半導体装置全体を高周波電流加熱
装置6中で高周波電磁界中にさらすことによシ、A看電
極+ AuワイヤCuリード等の導体部分及びそれらの
接続部分に温度衝撃を与えて検査を行なうものである。One embodiment of the present invention is an AA formed on the surface of a semiconductor element (St chip) 1 as shown in FIG.
One end of a wire 3 made of Au or An is bonded (connected) to a different electrode 2, and the other end of this wire is connected to an external lead 4 made of Cu or the like, and the top is placed in a resin (synthetic resin) molded body 5. By exposing the entire semiconductor device, which is formed by sealing the resin well and exposing a portion of the leads 4 to the outside of the resin, to a high frequency electromagnetic field in a high frequency current heating device 6, the A electrode + Au wire Cu lead is heated. The test is performed by applying temperature shock to the conductor parts and their connection parts.
なお同図において、7は高周波加熱用電極、8は特性測
定用の端子である。In addition, in the figure, 7 is an electrode for high frequency heating, and 8 is a terminal for measuring characteristics.
上述の方法によれは、高周波電流加熱を利用することに
よシ樹脂体内に封止された電極等の金属部分を樹脂体を
破壊することなく、瞬時に加熱することができ、AA
N、極やリードに対するボンディングワイヤの不完全圧
着による半断線不良等を短時間で発見することができる
。樹脂封止トランジスタを対象として実験したところに
よれば、高周波電流を流すと短時間で樹脂(エポキシ樹
脂)は50Cに加熱されチップからワイヤ、リードに誘
導電流が流れて接ぎ目の細い個所が高温加熱され抵抗が
大きくなって焼き切れることがわかった。By using high-frequency current heating, metal parts such as electrodes sealed inside the resin body can be heated instantly without destroying the resin body, and the AA
Half-disconnection defects caused by incomplete crimping of bonding wires to N poles and leads can be discovered in a short time. According to experiments conducted on resin-sealed transistors, when a high-frequency current is applied, the resin (epoxy resin) is heated to 50C in a short period of time, and an induced current flows from the chip to the wires and leads, causing high temperatures at the thin joints. It turned out that it heats up and the resistance increases, causing it to burn out.
従来の方法では外部の加熱体と素子との間に熱媒体とし
て空気や樹脂が介在するために電極部分まで加熱するの
に相轟な時間がが\っだが、本発明では高周波磁界内に
ある金属部分を集中的にかつ瞬間的に加熱できるために
スクリーニングの効率がきわめて大となる。In the conventional method, since air or resin is interposed as a heat medium between the external heating body and the element, it takes a long time to heat up to the electrode part, but in the present invention, it takes a long time to heat up to the electrode part. Screening efficiency is extremely high because metal parts can be heated intensively and instantaneously.
又、本発明によれば従来のような恒温槽を使用する必要
がなく、高周波電流加熱手段さえあればよいため、検査
装置を小型にコンパクト化し、設備価格も安くでき1、
したがって量産化にも適合できる。In addition, according to the present invention, there is no need to use a constant temperature bath like in the past, and all that is required is a high-frequency current heating means, so the inspection device can be made smaller and more compact, and the equipment cost can be lowered.
Therefore, it can be adapted to mass production.
さらに本発明によれば、検査される半導体装置を静止さ
せた状態で温度サイクル検査が可能で、かつ、短時間に
検査ができることがら、検査の自動化が実現できる。例
として半導体製品のマーク機。Further, according to the present invention, the temperature cycle test can be performed while the semiconductor device to be tested is kept stationary, and the test can be performed in a short time, so that automation of the test can be realized. An example is a marking machine for semiconductor products.
選別機あるいはハンドラー等に本発明による高周波電流
加熱手段を有する検査装置をとシっけることによシスク
リーニング効率を上げることが可能である。System cleaning efficiency can be increased by installing an inspection device having a high-frequency current heating means according to the present invention in a sorter, handler, or the like.
本発明による非破壊検査法は実施例で説明した樹脂封止
型トランジスタ以外に樹脂封止型IC。The nondestructive testing method according to the present invention can be applied to resin-sealed ICs in addition to the resin-sealed transistors described in the embodiments.
セラミック封止型のIC,4るいはプリント配線基板に
各種の素子を実装したハイブリッドIC等、半導体製品
全般に適用して効果きわめて大である。It is extremely effective when applied to all semiconductor products, such as ceramic-sealed ICs and hybrid ICs in which various elements are mounted on a printed wiring board.
第1図は本発明による非破壊検査法の一実施形態を説明
するための半導体装置の断面と検査装置の概略図である
。
1・・・半導体チップ、2・・・A2電極、3・・・ワ
イヤ、4・・・リード、5・・・樹脂封止体、6・・・
高周波電流加熱装置、7・・・電極、8・・・端子。
クー
代理人 弁理士 薄 1)利!′華 第 1 図FIG. 1 is a cross-sectional view of a semiconductor device and a schematic diagram of an inspection apparatus for explaining an embodiment of the non-destructive inspection method according to the present invention. DESCRIPTION OF SYMBOLS 1... Semiconductor chip, 2... A2 electrode, 3... Wire, 4... Lead, 5... Resin sealing body, 6...
High frequency current heating device, 7... electrode, 8... terminal. Ku Agent Patent Attorney Bo 1) Interest! 'Flower Figure 1
Claims (1)
縁物により封止し、上記リードの一部を外部に露出して
成る半導体装置の温度変化に対する非破壊検査を行なう
にあたって、上記半導体装置を高周波電磁界中に入れて
上記検査を行なうことを特徴とする半導体装置の非破壊
検査法。1. When conducting a non-destructive test against temperature changes on a semiconductor device in which the soil to which the leads are connected to the electrodes on the surface of the semiconductor chip is sealed with an insulating material and a portion of the leads are exposed to the outside, the semiconductor device is A non-destructive testing method for semiconductor devices, characterized in that the above-mentioned testing is performed in a high-frequency electromagnetic field.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57156659A JPS5946868A (en) | 1982-09-10 | 1982-09-10 | Non-destructive inspection of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57156659A JPS5946868A (en) | 1982-09-10 | 1982-09-10 | Non-destructive inspection of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5946868A true JPS5946868A (en) | 1984-03-16 |
Family
ID=15632487
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57156659A Pending JPS5946868A (en) | 1982-09-10 | 1982-09-10 | Non-destructive inspection of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5946868A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62144339A (en) * | 1985-12-19 | 1987-06-27 | Matsushita Electronics Corp | Inspection method of semiconductor device |
JPH06201771A (en) * | 1992-10-27 | 1994-07-22 | Internatl Business Mach Corp <Ibm> | Electronic-device processing method using microwave radiation |
CN102998606A (en) * | 2011-09-08 | 2013-03-27 | 富士电机株式会社 | Device and method for testing characteristics of semiconductor element |
-
1982
- 1982-09-10 JP JP57156659A patent/JPS5946868A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62144339A (en) * | 1985-12-19 | 1987-06-27 | Matsushita Electronics Corp | Inspection method of semiconductor device |
JPH0727949B2 (en) * | 1985-12-19 | 1995-03-29 | 松下電子工業株式会社 | Semiconductor device inspection method |
JPH06201771A (en) * | 1992-10-27 | 1994-07-22 | Internatl Business Mach Corp <Ibm> | Electronic-device processing method using microwave radiation |
CN102998606A (en) * | 2011-09-08 | 2013-03-27 | 富士电机株式会社 | Device and method for testing characteristics of semiconductor element |
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