JPS5946044A - Semiconductor device - Google Patents

Abstract

PURPOSE:To inhibit the generation of switching noises even using a thin power supply wiring by setting up a capacitance between a power supply wire in a master slice system logic IC and a ground wire. CONSTITUTION:The capacitance 607 is arranged at a position where a cell series is divided into N pieces of equal parts between the pectinate power supply wire 602 of a logic IC pellet and the ground wire 605, charges are fed from the capacitance 607 on the switching of a logic circuit, and a voltage drop generated in a power supply wiring is reduced to lower noises up to 1/N. Capacitance is obtained as the sum of MOS capacitance through an insulating film 706 and the junction capacitance of an N type substrate 703 and a P layer 704 when the width of the ground wire 701 is widened selectively and connected to the substrate 703 and the power supply wire 702 is connected to the layer 704. According to said constitution, the device is made free from noises due to the impedance of the power supply wiring only by previously dispersing and arranging capacitance to a power supply wiring system.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and particularly to a master slice type semiconductor device.

Logic integrated circuit near M (・Ma, delay time・consumption city, power (1
(From the point of view of the small size of
Increasingly, logic circuits are formed by logic circuits that consume much of the energy consumption only when switching. However, for this type of logic integrated circuit, the power supply wiring system is thin due to its low power consumption of: j6 kJ when at rest.

In order to reduce the delay time, that is, to realize high-speed switching, it is necessary to increase the capacity of the load and the capacity of the elements themselves that form the logic circuit.
For charging and discharging, a thick T (driving current is required, but the driving current is supplied to the logic product circuit via the logic integrated circuit's power supply line or the ground potential supply line. Ru.

Therefore, if a thin power supply wiring system was used as in the past, it would be impossible to predict its operation in advance (at the base design stage), as in master slice LSIs. - Due to the impedance of the power supply wiring system, noise may be generated during high-speed switching, resulting in malfunction or the high-speed switching ability of the element itself not being utilized, and sufficient performance may not be achieved.

The present invention provides a logic collection solution that eliminates the above-mentioned drawbacks. (Regarding circuits.

The feature of the present invention is that the fi:i-shaped loop layout of the master slice logic concentrator circuit is
, Yanagi m.

Pressure (It supply line and 4v: "t!'
1 capacitor is installed and each cell series is equally divided into cans & V.
There is a semi-adulterated version of the condenser mixed with vinegar.

Next 1 by ``Ki-niri'' lit! ! The death of the deceased.

Figure 1) Rabbit, Figure 2 &? , general 7. Cs is a complementary type MO5Xir embedded circuit, and FIG. 1 shows the input terminal 10.
Figure 2 also shows that when the input voltage of 3 transitions from a high level to a low level, a current of 1N temporarily flows from the supply line with a peak current IPP. is the input curve, the input m from the child 203, and the pressure is at a low level or 1') If 'j is also shifted by 1 to high L/bell,
In order to discharge each load +1-i-(zu1), phase current 11 or peak-current 'NP' is shown to flow instantaneously to the ground potential supply line.

/J, complementary MO as shown in Figures 1 and 2.
If we draw the 8 logic circuit as shown in Figure 3 with a focus on the power supply system, we will see a master circuit with a 111-bit power supply wiring system as shown in Figure 4.
The equivalent circuit of the power supply system dregs of a slice-type logic integrated circuit is
It will look like Figure 5. Only the raccoon circuit Gi switches and connects the power supply to ■i source (, When power is supplied from the power supply line 1, the voltage from the input that occurs on the power supply line is ``TΔvi, Δv7(t)-3g ・I, , (t) (L('4
≧O)ノ=1. Therefore, by converting the above equation into a film by superposition, we can express the voltage drop at the source potential 4-, which is supplied to the logic circuit GN which is far from the external input of the source supply line R;-. Expressed as the following equation and '1. [ru.

Currently, due to the pancreatic speed switching system, each logic circuit has a power supply of 1 or several 7n A peak (correction - more flying current σ
) are supplied 2. Therefore, complex f, jt logic lIJ
! When the traces perform switching operations at the same time, a wire with a width of 13yicm is used for the electric steering. 4, and this JI is accompanied by noise, malfunction, or an increase in delay time due to a substantial drop in power supply box pressure.Therefore, in order to avoid failure during this period, 15 to 0 year olds are not allowed to enter the market. , source resistance 1
111Ij! It is necessary to make the width sufficiently thick Σ) Rishi, Z,
In "Ko" 1, Shinkyumi Iino? ◇Due to DjB competition restrictions,
Chip 1h1dan's 7: Includes fat.

The present invention resolves this problem, and specifies (・1Vυ
However, in case of special use, due to the generation of noise during switching, the power supply P of the master slice type A capacitor is formed between the picture silk and the contact j'J1 potential 4.11 When the M buried circuit is switched, the charge from the capacitor is 11 (by #, the logic circuit 1/') is switched.IpCjfi, Voltage 1' generated in the source wiring
A logic integrated circuit characterized by reduced power consumption6
゜This effect is good, (for Shimero, nuclear condensation)
1, Yo, Denrensai, -? Se, /L series in the series? It is necessary to arrange the cells at positions where they are divided into equal parts, and the cell series is divided into N equal parts using a (N-1,) quotient capacitor.

By dividing the series into N equal parts, the noise during switching is reduced to 1/H.

FIG. 6 shows an embodiment to which the present invention is applied.

607 is a capacitor inserted between the lightning 1 source voltage supply line and the ground potential supply line, which is a feature of the present invention, and is arranged so as to equally divide the cell series in the power supply wiring on the chip as shown in Figure 6. celebrate. In the seventh issue, a structural diagram of an example in which a capacitor 607 is realized by a single-layer metal wiring process is shown.

In the structure shown in FIG.
make contact with the type semiconductor substrate or well. The single-layer metal interconnection 702 for supplying power supply voltage makes contact with the P-type semiconductor substrate or the N-type diffusion layer formed in the capacitance forming portion in the well. A capacitor with this structure has a capacitor with a metal wiring 701 and a thin (diffusion layer 70 via an insulating film 706)
4 and the junction capacitance h1 between the semiconductor substrate 703 or the well and the diffusion layer 704. In addition, in Figure 7, the power supply voltage supply line and the ground tank 1 supply line are reversed, and the P-type semiconductor substrate or well is replaced with the N11llJ raw conductor substrate or well.
Even if the N-type diffusion layer is replaced with a P-type expansion layer, it is formed in the same manner. If a multilayer metal wiring process is used, a capacitor can be realized by thinning the insulating film between the layers only in the capacitor forming part. By supplying a charging/discharging current of , it is possible to reduce the voltage drop that occurs in the power supply wiring during switching of the logic circuit.

Next, the effects of the present invention will be described. The effect of the present invention is that in a logic integrated circuit, when a logic circuit that consumes a large amount of power TE current only during one switching is used in a complementary MO8 logic circuit, it is possible to reduce the However, the area occupied by the power supply wiring can be reduced because a voltage drop occurs due to the wiring impedance of the power supply wiring.Especially in master slice LSIs,
Due to its nature, the master slice LSI allows the operation of the logic circuit to be assumed when designing the power supply wiring (during groundwork).
・Therefore, by distributing capacitors in advance in the frost source wiring system i, fl−, πI, free from noise due to the wiring impedance of the source wiring (・5 The advantages of the present invention are obvious. It is a name.

[Brief explanation of drawings]

Figure 1 shows the output of the complementary MO8 logic circuit from low level to high level, and Figure 2 shows the output of the complementary MO8 logic circuit from high level to low level. 3 is a simplified diagram of the complementary MO8 logic circuit of FIGS. 1 and 2. FIG. 4 is a diagram showing the master slice circuit. Figure 5 shows the equivalent circuit of the arrangement shown in Figure 4. Figure 6 shows the wiring of the logic circuit f7+ circuit to which the present invention is applied. Fig. 17 shows the cypress cutting section of the capacitor used in the present invention, and Fig. 8 shows an example of the shape of the capacitor forming part. , 101...P gouyannel ~ 1.O8) Range nut, 102...N channel N08) transistor, 103...Logic circuit signal output terminal, 104...Logic circuit Signal output terminal, 】05... Input capacity (wiring and transistor own capacity), 106... Electric gland voltage supply gauze, 1
07...Ground 'lf supply line, 108...
・Load capacity charging current eaves, 201...P channel MO8) transistor, 202...N channel N
10S) transistor, 203...I\1 logic circuit signal input terminal, 204...logic circuit/signal output terminal, 205...load Furukawa-1206...
Power supply 'Ft. 207...Contact 11! ! Potential supply heart, 2
08...Load capacity number 11", 12 β road, 401.
...t:p+I J)-1j ``33 times L dairy beret, 402...Tie, n supply line Bonra ink no kurado, 403... city, source supply Jun,
404...Ground'+1. J-position supply line Bongaink, pad, 405...J'jQ Jilt717
40 (j...Signal bonding,
・(Rad, G,, G, ~G, ~GN... Theory Jjj
Circuit, [1・[,=ri to I'N・・・・・・・・・
Wiring between 1 and 1 adjacent logic lip circuits (pile, 501...
...'r (1, Hanako, 502... ground terminal, (iol... logic year 4 circuit σ to which the present invention is applied)
Pe+i:) 1., 602...-Power supply line Bonting Bart, 603...Lightning, Minamoto-naka 9 supply line, 6
04...Ground 'IT position (1i, feed line bonding), 605......Contacting) T potential supply Y replacement 1.606...For number 71'nding pad, 607...F angle circuit switching 1 (ro, 111 source wiring city, voltage drop prevention capacitor, 701
... Single-layer metal 1 ax for supplying ground mist level) a, 702.
.../, 1. , t.--more comb genus arrangement for the supply of arousal, 7
03...1゛ type half-body difference - hole or well, 70
4...N-type diffusion layer, 7(+5...Interlayer insulating film, 70G...-Insulation +
1! , 801......connection' 1 to lightning 1st place A 11: supply first layer gold plate wiring, 802...1 Show 2 (・ru. Agent Patent Attorney Uchihara y Kidney No. 1 Closed Figure 2 Closed Figure 3 Closed 40th Closed Figure 7 02 8th Leap

Claims (1)

[Claims] In the comb-shaped electrical wiring system underlying the master slice type logic integrated circuit, there is a capacitor of one capacitor for each cell series in the chip between the voltage supply f♀ and the ground potential supply line. An interior of a semiconductor device, characterized in that the capacitor is arranged at a position that equally divides each cell series.