JPS5945664U - square root calculator - Google Patents
square root calculatorInfo
- Publication number
- JPS5945664U JPS5945664U JP14229382U JP14229382U JPS5945664U JP S5945664 U JPS5945664 U JP S5945664U JP 14229382 U JP14229382 U JP 14229382U JP 14229382 U JP14229382 U JP 14229382U JP S5945664 U JPS5945664 U JP S5945664U
- Authority
- JP
- Japan
- Prior art keywords
- converter
- integrated
- switch
- square root
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の開平演算器を示すブロック図、第２図は
本考案の一実施例を示す回路図、第３図は第２図の回路
の動作を説明するタイミングチャートである。
１１・・・２重積分型Ａ−Ｄ変換器、１２・・・積分回
路、Ｓ３・・・スイッチ、Ｅｉ・・・測定電圧、Ｅｓ・
・・基準電圧。FIG. 1 is a block diagram showing a conventional square root calculator, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a timing chart explaining the operation of the circuit shown in FIG. DESCRIPTION OF SYMBOLS 11...Double integration type A-D converter, 12...Integrator circuit, S3...Switch, Ei...Measurement voltage, Es...
...Reference voltage.
Claims (1)
３を介して接続された積分回路１２とから成り、前記ス
イッチＳｓＧ閉じると共に２重積分型Ａ−Ｄ変換器１１
の入力に測定電圧Ｅｉを接続して一定時間Ｔ工その電圧
をＡ−Ｄ変換器で積分し、かつその積分出力を積分回路
１２で更！千積分し、次にスイッチＳ３を開成して、２
重積分型Ａ−Ｄ変換器１１の入力に基準電圧Ｅｓを接続
し、該Ａ−Ｄ変換器で積分を行なうと共に、−その積分
値が所定の値になった時再びスイッチＳ３を閉じてＡ−
Ｄ変換器の積分出力を積分回路で積分し、この積分回路
の積分値が一定の値になるまでの時間Ｔ２を測定して、
この時間Ｔ２から測定電圧Ｅｉの開平値を得ることを特
徴とする開平演算器。A double integral type A-D converter 11 and a switch S on its output side
When the switch SsG is closed, the double integration type A-D converter 11
The measured voltage Ei is connected to the input of T, the voltage is integrated by the A-D converter for a certain period of time, and the integrated output is updated by the integrating circuit 12. 1,000 integration, then open switch S3, and
The reference voltage Es is connected to the input of the multiple integration type A-D converter 11, and the A-D converter performs integration, and when the integrated value reaches a predetermined value, the switch S3 is closed again and the A-D converter 11 is connected to the reference voltage Es. −
The integral output of the D converter is integrated by an integrating circuit, and the time T2 until the integrated value of this integrating circuit reaches a constant value is measured,
A square root calculation unit that obtains the square root value of the measured voltage Ei from this time T2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14229382U JPS5945664U (en) | 1982-09-20 | 1982-09-20 | square root calculator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14229382U JPS5945664U (en) | 1982-09-20 | 1982-09-20 | square root calculator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5945664U true JPS5945664U (en) | 1984-03-26 |
Family
ID=30317992
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14229382U Pending JPS5945664U (en) | 1982-09-20 | 1982-09-20 | square root calculator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5945664U (en) |
-
1982
- 1982-09-20 JP JP14229382U patent/JPS5945664U/en active Pending
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