JPS5941845A - ２層式集積回路用キヤリアテ−プ、その製造方法 - Google Patents

２層式集積回路用キヤリアテ−プ、その製造方法

Info

Publication number
JPS5941845A
JPS5941845A JP57151877A JP15187782A JPS5941845A JP S5941845 A JPS5941845 A JP S5941845A JP 57151877 A JP57151877 A JP 57151877A JP 15187782 A JP15187782 A JP 15187782A JP S5941845 A JPS5941845 A JP S5941845A
Authority
JP
Japan
Prior art keywords
layer
tape
tape material
lead
copper foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57151877A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0142500B2 (enExample
Inventor
Atsushi Kusakabe
日下部　淳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JTEKT Column Systems Corp
Original Assignee
Fuji Kiko Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Kiko Co Ltd filed Critical Fuji Kiko Co Ltd
Priority to JP57151877A priority Critical patent/JPS5941845A/ja
Publication of JPS5941845A publication Critical patent/JPS5941845A/ja
Publication of JPH0142500B2 publication Critical patent/JPH0142500B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass

Landscapes

  • Wire Bonding (AREA)
JP57151877A 1982-08-31 1982-08-31 ２層式集積回路用キヤリアテ−プ、その製造方法 Granted JPS5941845A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57151877A JPS5941845A (ja) 1982-08-31 1982-08-31 ２層式集積回路用キヤリアテ−プ、その製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57151877A JPS5941845A (ja) 1982-08-31 1982-08-31 ２層式集積回路用キヤリアテ−プ、その製造方法

Publications (2)

Publication Number Publication Date
JPS5941845A true JPS5941845A (ja) 1984-03-08
JPH0142500B2 JPH0142500B2 (enExample) 1989-09-13

Family

ID=15528152

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57151877A Granted JPS5941845A (ja) 1982-08-31 1982-08-31 ２層式集積回路用キヤリアテ−プ、その製造方法

Country Status (1)

Country Link
JP (1) JPS5941845A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5118556A (en) * 1989-10-03 1992-06-02 Matsushita Electric Industrial Co., Ltd. Film material for film carrier manufacture and a method for manufacturing film carrier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5118556A (en) * 1989-10-03 1992-06-02 Matsushita Electric Industrial Co., Ltd. Film material for film carrier manufacture and a method for manufacturing film carrier

Also Published As

Publication number Publication date
JPH0142500B2 (enExample) 1989-09-13

Similar Documents

Publication Publication Date Title
CA1116308A (en) Tape automated bonding test board
EP1601053A1 (en) Wired circuit board and connection structure of wired circuit board
US5366794A (en) Tape carrier for semiconductor apparatus
US5953594A (en) Method of making a circuitized substrate for chip carrier structure
JPH03246993A (ja) 実装基板
US7307854B2 (en) Flexible wired circuit board
US5679498A (en) Method for producing high density multi-layer integrated circuit carriers
US6110650A (en) Method of making a circuitized substrate
JPH08153971A (ja) 多層プリント配線基板及びその製造方法
JP2529987B2 (ja) 多層印刷配線板装置の製造方法
JP3751938B2 (ja) Ｔａｂ用テープキャリアおよびその製造方法
JPS60100454A (ja) プリント配線板の製法
JPH0142500B2 (enExample)
JPH09186416A (ja) 表面実装型電子部品用基板およびその製造方法
JP2623980B2 (ja) 半導体搭載用リード付き基板の製造法
US6395994B1 (en) Etched tri-metal with integrated wire traces for wire bonding
JP2787230B2 (ja) 電子部品塔載用基板
JPH01183195A (ja) 多層印刷配線板装置の製造方法
KR0134646B1 (ko) 역적층 초박형 패키지 및 그 제조방법
JPH0278253A (ja) 多層プラスチックチップキャリア
JP2700257B2 (ja) 配線基板付きリードフレームとその製造方法
JPS6175596A (ja) スルホール多層回路基板の製造方法
JPH05226839A (ja) 多層電子部品搭載用基板の製造方法
JPH0152916B2 (enExample)
Small Tape Automated Bonding and its Impact on the PWB