JPS5940324B2 - frequency phase synchronizer - Google Patents

Description

[Detailed description of the invention] The present invention relates to a frequency phase synchronizer.

The system shown in FIG.
This is a block diagram of the system.

The phases of the output signal from the voltage controlled oscillator 1 and the output from the reference frequency signal generator 2 are compared by the phase detector 3, and the error voltage is fed back as a control signal to the voltage controlled oscillator 1 to function as a loop. The oscillation frequency coincides with the reference frequency, and their phases are 90 degrees apart from each other at the input of the phase detector 3.
It becomes stable by maintaining the 0° relationship.

Figure 2 shows the characteristics of the phase detector 3 in Figure 1.
The characteristic of the error output voltage proportional to the phase difference between the two input signals is shown centered around the phase difference of 90°.

As can be seen from Figures 1 and 2, PLL is originally
This is to match the oscillation phase of the oscillator with the phase of the reference frequency signal, and if the oscillator frequency deviates significantly from the reference frequency, it will no longer be pulled in.

More specifically, the PLL performs automatic phase control, ie, APC operation, but does not have the ability to perform automatic frequency control, ie, APC operation.

In a PLL, when the free-running oscillation frequency of the voltage controlled oscillator is equal to or very close to the reference frequency, the phase detector performs an instantaneous phase comparison and outputs an error output for feedback, thereby ensuring complete accuracy. It performs phase-synchronized oscillation.

Therefore, the voltage controlled oscillator must have extremely high temperature stability, and its realization requires various considerations, making the circuit complex and expensive.

FIG. 3 is a block diagram of a system in which a PLL is used in a video detection system of a television receiver.

4 is a high frequency amplifier that outputs a high frequency video signal which is a first reference frequency signal; 5 is a local oscillator of a tuner of a voltage controlled oscillator; and 6 is a local oscillation signal for converting the high frequency video signal from the high frequency amplifier 4 into a local oscillation signal from the local oscillator 5. Video intermediate frequency (V
It is a frequency converter, ie, a tuner mixer, that converts the signal into an IP (IP) signal.

7 is a VIP carrier oscillator for the second reference frequency signal; 8 compares the phases of the VIF signal that is the output of the mixer 6 and the VIP carrier that is the output of the VIF carrier oscillator 7; This is a phase detector that uses the control signal as the control signal.

With this configuration, the phases of the VIP signal obtained by the mixer 6 and the oscillation output of the VIP carrier oscillator 7 are stabilized with a phase difference of 900 degrees at the input of the phase detector 8.

Therefore, if a carrier in phase with the VIP signal is obtained from the VIP carrier oscillator 7 and the VIP signal is synchronously detected by the video detector 9, a correct video signal can be obtained.

In television receivers, synchronous detection is essential to remove orthogonal distortion of video signals caused by residual sidewave transmission, but as mentioned above, the synchronization pull-in range of PLL is narrow, making it difficult to use very stable tuners. local oscillator 5 and VIP
A carrier oscillator 7 is required, and the temperature coefficients of the respective oscillators must also be matched, which has not been realized except in special commercial receivers.

Therefore, it is an object of the present invention to provide a frequency phase synchronizer that can significantly expand the pull-in range.

FIG. 4 is a block diagram of an embodiment of the invention.

1.2 and 3 are the same as the same reference numerals in FIG. 1, and are a voltage controlled oscillator and a reference frequency signal generator, respectively.

This is a first phase detector.

The features of this device include a resonator 10 and a second phase detector 11.
, the tuning frequency of the resonator 10 matches the reference frequency of the reference frequency signal generator 2 , and the output of the resonator 10 is connected to the output of the voltage controlled oscillator 1 .

The inputs of the second phase detector 11 are the output signal of the voltage controlled oscillator 1 and the output signal of the resonator 10, and the output of this second phase detector 11 also serves as a control signal for the voltage controlled oscillator 1.

Since the resonator 10 is tuned to the reference frequency of the reference frequency signal generator 2, the phase difference between its input and output is zero at the tuned frequency, but when the frequency of the input signal deviates from the tuned frequency, the phase difference is proportional to the frequency difference. A phase difference occurs between input and output.

Its characteristics are shown in FIG. The horizontal axis is the input frequency, the center is the tuning frequency, and the vertical axis is the phase difference between input and output, indicating that a phase difference proportional to frequency occurs within a certain frequency range.

Now, in the system shown in Fig. 4, if the free-running oscillation frequency of the voltage controlled oscillator 1 deviates from the reference frequency,
Phase comparison between the two frequencies becomes impossible, and the output of the phase detector 3 becomes a fluctuating output having a frequency of the beat of the image frequency, and the system does not perform stable normal operation.

However, the inputs of the second phase detector 11 are a direct input from the voltage controlled oscillator 1 and an input from the voltage controlled oscillator 1 via the resonator 10, and the input power is a signal having exactly the same frequency.

However, since one input signal passes through the resonator 10, there is a phase shift with respect to the other input signal.

Since the resonator 10 is tuned to the reference frequency, if the signal from the voltage controlled oscillator 1 matches the reference frequency, the phase shift amount is zero, and as it deviates from the reference frequency, the phase shift becomes positive or negative. produce a quantity.

Therefore, if the frequency of the voltage controlled oscillator 1 deviates from the reference frequency, the phase detector 11 detects the phase difference corresponding to the deviation, generates an error output, and feeds back, so that the system can operate at the correct frequency. performs AFC operation to match.

If this happens, the first phase detector 3 will operate normally and the AP
By C operation, the phase is synchronized and a complete PLL system is achieved.

As a result of this configuration, it is possible to synchronize over a wide frequency range that could not be achieved with only the second phase detector 3, thereby increasing the stability of the system and at the same time improving the temperature stability of the voltage controlled oscillator 1. It has great industrial value, and there is no harm in reducing it.

FIG. 6 is a block diagram of the present invention applied to a video detection system of a television receiver.

4゜ 5, 6, 7, 8, and 9 are the same as the same symbols in FIG. 3, and are a high frequency amplifier that outputs a high frequency video signal that is the first reference frequency signal, and a local oscillator 2 frequency conversion of a voltage controlled oscillator, respectively. VI of the second reference frequency signal
They are a P carrier oscillator, a first phase detector, and a video detector.

This device is characterized by the use of a resonator 12 and a second phase detector 13.

The resonator 12 is tuned to the VIP carrier oscillator 7 of the second reference frequency signal, and the phase difference between its input and output is zero at the tuned frequency, and when the frequency deviates from there, it takes a value proportional to the deviated frequency.

Now, if the frequency of the local oscillator 5 deviates from the correct value, the VIP frequency obtained from the mixer 6 will also deviate from the normal value, that is, the VIP carrier frequency of the carrier oscillator 7.

In this case, the first phase detector 8 does not operate normally.

However, since the inputs of the second phase detector 13 are two signals having a phase difference at shifted frequencies, a correct error voltage is generated, and this is fed back to the voltage controlled oscillator 5, so that the system performs AFC operation. Try to stabilize each part to the correct frequency.

When this happens, the first phase detector 8 operates normally and the APC
Through operation, the phases are synchronized and a complete PLL system is achieved.

As a result, it is possible to synchronize over a wide frequency range that could not be achieved with the first phase detector 8 alone, increasing the stability of the system and obtaining a stable video signal.
The stability of the local oscillator 5 of the tuner and the stability of the carrier oscillator 7 of the VIP may be reduced to a practical level, and the temperature coefficients of both total oscillators 5 and 7 do not need to be completely matched. Therefore, the industrial value is greatly increased.

Note that APC is necessary for the following reason.

That is, conventionally, envelope detection using a diode or the like has been generally used for video detection of television.

However, this method cannot remove orthogonal distortion of the video signal due to residual sidewave transmission.

The only way to solve this problem is to carry out synchronous detection in the same phase, which also requires reference signals whose phases completely match.

In this invention, instead of matching the phase of the reference signal with the phase of the VIP signal, the AP controls the local oscillator of the tuner so as to match the phase of the VIP signal with the phase of the reference signal.
C configuration is adopted, and if only the AFC system is used, the frequencies match, but the phases do not match, so in-phase synchronous detection as video detection cannot be realized.

FIG. 7 is a block diagram of another embodiment of the present invention;
, 5, 6, 7, 9, and 12 are the same as those with the same reference numerals in FIG.

The feature of this device is that the first and second phase detectors 8°13 in FIG. 6 are replaced by a common phase detector 14,
A switch 15 connects one of the inputs of the phase detector 14 to the output signal of the resonator 12 and the second reference frequency signal from the oscillator 1.
It is designed so that it can be switched with .

The reason why the phase detector can be shared in this way is as described below.

That is, in FIG. 6, the first phase detector 8 constituting the APC system is also the second phase detector 1 constituting the AFC system.
3 may have exactly the same circuit configuration.

In general, a phase detector can be configured with a circuit that obtains an AND of two inputs and a low-frequency wave detector.

Therefore, the signals handled are not necessarily limited to specific frequencies.

Therefore, as shown in Fig. 1, the first and second phase detectors are shared as 14, and sometimes operate as an APC-system phase detector, and at other times operate in a time-division manner as an AFC-system phase detector. It is possible to do so.

When the switch 15 is connected to the resonator 12 side as shown by the solid line in the figure, the system performs AFC operation, and when the switch is connected to the ViF carrier oscillator 7 side as shown by the dotted line, the system performs APC operation. Let's do it.

In addition, each time the power is turned on or the channel is changed, the AFC
A timer may be activated at the same time as the operation is performed, and the switch 15 may be automatically operated so that the timer output automatically switches to the APC operation after a certain period of time.
In a PC system, if the frequencies of the two input signals to the phase detector 14 are different, the output signal of the phase detector 14 changes in an alternating current manner with a period corresponding to the beat frequency of the two input signals. 15 may be connected to the APC side, and an AC detector may be provided for switch control to detect fluctuations in the output of the phase detector 14 so as to automatically switch to the APC side when the output of the phase detector 14 becomes stable.

Furthermore, it is easily possible for those skilled in the art to detect the switching of the switch 15 using the output of the video detector 9.

That is, when the output of the video detector 9, which is a phase detector, changes in an alternating current manner, the switch 15 is connected to the AFC side, and when the output becomes stable, it is automatically switched to the AFC side. An AC detector for detecting fluctuations may be provided for switch control.

This embodiment is advantageous over the one shown in FIG. 6 in that the phase detector 14 can be shared.

FIG. 8 is a block diagram of another embodiment of the present invention;
, 5, 6, and 9 are the same as the same reference numerals in FIG. 6, respectively.

A feature of this device is that the VIP carrier oscillator 7 in FIG. 6 is constructed from a system of a resonator 16 and a positive feedback oscillator 17.

When the changeover switch 19 is connected as shown in the dotted line, the resonator 16 is tuned to the VIP carrier frequency, so the system of the resonator 16 and amplifier 17 functions as a positive feedback oscillator, and the phase detector 18 detects the overall signal. The system performs APC operation to perform correct video detection.

When the frequency of the voltage control oscillator 5 shifts and the PLL is disconnected, the switch 19 is connected to the solid line side shown in the figure, and the system performs AFC operation in exactly the same way as when the switch 15 in Fig. 7 is connected to the solid line side. do.

Therefore, as in the case of FIG. 7, if the frequencies are off, AFC operation is performed, and when the frequencies are correct, the switch 19 is switched to achieve PLL of APC operation.

Needless to say, the switching of the switch 19 can be performed automatically in the same manner as described in the explanation of FIG.

In this embodiment, compared to the one in FIG. 7, the resonator 16 forms a part of the second reference oscillator, so in addition to the advantage that the circuit is simpler, the center frequency when operating as an AFC This is very advantageous in that it uniformly matches the second reference frequency when operating as an APC, and requires fewer adjustments.

In the above description, the oscillation frequency of the voltage controlled oscillator 1 or 5 is fixed in a stable state, but in actual operation, it is often desired to slightly change or adjust the frequency in the stable state.

Especially when applied to the video detection system of a television receiver, the frequency of the local oscillator is slightly offset from the normal frequency to avoid interference and adjacent channel interference, and to make it difficult to see the beat frequency caused by interference. The need arises.

In such a case, in the embodiment shown in FIG. 4, the above-described offset can be easily implemented by changing the frequency of the reference frequency signal generator 2 and the resonant frequency of the resonator 10 in conjunction with each other.

In the embodiments shown in FIGS. 6 and 7, the oscillation frequency of the VIP carrier oscillator 7 and the resonance frequency of the resonator 12 may be changed in conjunction with each other.

In the embodiment shown in FIG. 8, the resonator 16 itself also constitutes an oscillation system, so the above purpose can be achieved by simply changing the resonant frequency of the resonator 16.

It goes without saying that either embodiment is suitable for integrated circuits.

As described above, according to the present invention, the PLL synchronization pull-in range can be greatly expanded, and there is no problem even if the stability of the voltage controlled oscillator is lowered to a practical level, so an inexpensive PLL can be used. You can achieve the desired effect.

[Brief explanation of drawings]

Figure 1 is a block diagram showing the principle of a conventional PLL, Figure 2 is a characteristic diagram of its phase detector, Figure 3 is a block diagram of a conventional example that uses PLL video detection in a television receiver, and Figure 4. is a block diagram showing an embodiment of the basic configuration of this invention, FIG. 5 is a characteristic diagram of the resonator, FIGS. 6, 7, and 8.
Each figure is a block diagram showing the main parts of a television receiver to which an embodiment of the present invention is applied. DESCRIPTION OF SYMBOLS 1... Voltage controlled oscillator, 2... Reference frequency signal generator, 3... First phase detector, 10
...Resonator, 11...Second phase detector.

Claims (1)

[Claims] 1. A voltage controlled oscillator, a first phase detector which receives the output signal of the voltage controlled oscillator and a reference frequency signal as input,
a resonator tuned to the frequency of the reference frequency signal and receiving the output signal of the voltage controlled oscillator as input; and a second phase detector receiving the output signal of the voltage controlled oscillator and the output signal of the resonator as input. , a frequency phase synchronization device comprising means for supplying output signals of the first and second phase detectors to a control signal input terminal of the voltage controlled oscillator. 2. A voltage controlled oscillator, a frequency converter that receives the output signal of the voltage controlled oscillator and a first reference frequency signal as input, and a first frequency converter that receives the output signal of the frequency converter and the second reference frequency signal as input. a phase detector, a resonator tuned to the frequency of the second reference frequency signal and receiving the output signal of the frequency converter as input, and receiving the output signal of the frequency converter and the output signal of the resonator as inputs. A frequency phase synchronization device comprising: a second phase detector; and means for supplying output signals of the first and second phase detectors to a control signal input terminal of the voltage controlled oscillator. 3 The first and second phase detectors are one common phase detector, one of which is supplied with the output signal of the frequency converter as an input, and the other input is supplied with the second reference frequency signal. 3. The frequency phase synchronization device according to claim 2, wherein the output signal of the resonator is selectively switched and supplied by a switch. 4. a voltage controlled oscillator, a frequency converter that receives the output signal of the voltage controlled oscillator and a reference frequency signal as input, a resonator, a positive feedback amplifier connected in series to the output of the resonator, and a a switch that selectively switches and supplies the output signal of the frequency converter and the output signal of the positive feedback amplifier to an input end; and a phase detector that inputs the output signal of the frequency converter and the output signal of the resonator. and means for supplying an output signal of the phase detector to a control signal input terminal of the voltage controlled oscillator.