JPS593969A - Amplification gate type gate turn off thyristor - Google Patents
Amplification gate type gate turn off thyristorInfo
- Publication number
- JPS593969A JPS593969A JP11189882A JP11189882A JPS593969A JP S593969 A JPS593969 A JP S593969A JP 11189882 A JP11189882 A JP 11189882A JP 11189882 A JP11189882 A JP 11189882A JP S593969 A JPS593969 A JP S593969A
- Authority
- JP
- Japan
- Prior art keywords
- gate
- amplification
- layer
- doped
- turn
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 title claims abstract description 24
- 238000003199 nucleic acid amplification method Methods 0.000 title claims abstract description 24
- 238000000034 method Methods 0.000 abstract 1
- 238000010304 firing Methods 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910001385 heavy metal Inorganic materials 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
- H01L29/744—Gate-turn-off devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thyristors (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、増幅ゲート形ゲートターンオフサイリスタ、
特にそのゲート特性の改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention provides an amplification gate type gate turn-off thyristor,
In particular, it relates to the improvement of its gate characteristics.
周知の通り、ゲートタ二ンオフサイリスタ(以下、GT
Oと略称する)は自己消弧機能を有しておシ、ターンオ
フ特性を向上させるため、金などの重金属をドープして
ライフタイムキラーとした9、あるいはアノードエミッ
タ(Pl)層を短絡構造とすることがある。As is well known, gate turn-off thyristor (hereinafter referred to as GT
(abbreviated as O) has a self-extinguishing function.In order to improve the turn-off characteristics, it is doped with heavy metals such as gold to make it a lifetime killer9, or the anode emitter (Pl) layer is made into a short-circuit structure. There are things to do.
前者はターンオフタイムが減少するといった効果金生じ
るが、オン電圧の増大、漏れ電流の増加など不都合なこ
とも多くなる。これに対し、後者はpnp トランジス
タ部の電流増幅率αpが小さく抑制され、ターンオフ時
にはN1層に蓄積されていた過剰キャリアが21層の短
絡部を通して掃出されるなどの効果があり、前者に比較
してオン電圧の低減、漏れ電流の減少が可能である。The former has the advantage of reducing the turn-off time, but also has many disadvantages such as an increase in on-voltage and an increase in leakage current. On the other hand, in the latter case, the current amplification factor αp of the pnp transistor section is suppressed to a small value, and at turn-off, excess carriers accumulated in the N1 layer are swept out through the short-circuited part of the 21st layer. It is possible to reduce on-voltage and leakage current.
ところで、オンゲート電流の低減のためには増幅ゲート
構造とするのか有効であっても、増幅ゲート形GTOを
P1短絡構造としてライフタイムキラー全ドープしない
場合には問題が生じる。即ち、主GTQ部と同様に増幅
ゲート部もPm短絡構造とした場合には、ターンオンに
必要な最小のゲート電流工Gτが大きくなり、増幅ゲー
ト構造の長所が損われることになる。また、主GTO部
だけをPm短絡構造とした場合には、Xarが過小とな
り、ターンオフ時の誤点弧の原因となる。By the way, even if an amplification gate structure is effective for reducing the on-gate current, a problem arises if the amplification gate type GTO is made into a P1 short-circuit structure and the lifetime killer is not fully doped. That is, if the amplification gate section has a Pm short-circuit structure like the main GTQ section, the minimum gate current Gτ required for turn-on will increase, and the advantages of the amplification gate structure will be impaired. Furthermore, if only the main GTO section has a Pm short-circuit structure, Xar becomes too small, which causes erroneous ignition at turn-off.
本発明は上記の点を考慮してなされたもので、主GTO
部のみPm短絡構造とし、かつ増幅ゲート部のみライフ
タイムキラーをドープすることにより、ゲート特性の良
好な増幅ゲート形GTOi提供することを目的とする。The present invention has been made in consideration of the above points, and the main GTO
The object of the present invention is to provide an amplification gate type GTOi with good gate characteristics by making only the amplification gate part have a Pm short-circuit structure and doping only the amplification gate part with a lifetime killer.
以下、本発明を図示の未施例に基づいて詳細に説明する
。Hereinafter, the present invention will be described in detail based on illustrated examples.
図面は本発明の一実施例會示すもので、1は補強用タン
グステン板、2人及び2BはP層(アノードエミッタ)
、3はN層、4はP層、5ム及び5Bはカソードエミッ
タであシ、タングステン板1上にPNPN層が形成され
ている。2層2B。The drawing shows one embodiment of the present invention, where 1 is a reinforcing tungsten plate, 2 people and 2B are P layers (anode emitters).
, 3 is an N layer, 4 is a P layer, 5 and 5B are cathode emitters, and a PNPN layer is formed on the tungsten plate 1. 2 layers 2B.
N層3及びP層4の増幅ゲート部にはライフタイムキラ
ー6がドープされている。この増幅ゲート部はPIC短
m構造としていない。また、主GTO部はPm短絡構造
とし、ライフタイムキラーのドープはなしとする。The amplification gate portions of the N layer 3 and the P layer 4 are doped with a lifetime killer 6. This amplification gate section does not have a PIC short m structure. Further, the main GTO section has a Pm short-circuit structure and is not doped with a lifetime killer.
なお、N層5Aにカソード電極が形成され、P層4など
にゲート電極が形成されている。Note that a cathode electrode is formed on the N layer 5A, and a gate electrode is formed on the P layer 4 and the like.
上記したように、増幅ゲート形GTOにおいて、主GT
O部のみP、短絡構造とし、′がっ増幅ゲート部のみ゛
ライフタイムキラーをドープすると、ゲート電流工GT
が過大でも過小でもない適切な値となり、ターンオフ期
間における誤点弧の原因が除去される。As mentioned above, in the amplified gate type GTO, the main GT
If only the O part has a P, short-circuit structure, and only the amplification gate part is doped with a lifetime killer, the gate current structure GT
is an appropriate value that is neither too large nor too small, and the cause of false firing during the turn-off period is eliminated.
例えば、主GTO部はPa短絡構造でライフタイムキラ
ーのドープなし、増幅ゲート部はPm短絡構造ではなく
、かつライフタイムキラーのドープを行わない場合には
、ゲート電流IGTが50InAであったのに対し、本
実施例のように増−ゲート部のみライフタイムキラー會
ドープ(Au840C30min)I、た場合には、ゲ
ート電流EaTが300WIAとなった。For example, if the main GTO part has a Pa short-circuit structure and is not doped with a lifetime killer, and the amplification gate part is not a Pm short-circuit structure and is not doped with a lifetime killer, the gate current IGT would be 50 InA. On the other hand, when only the increased gate portion was doped with lifetime killer (Au840C 30 min) I as in this example, the gate current EaT was 300 WIA.
以上のように本発明によれば、主GTO部はPya短絡
構・造としてライフタイムキラーのドープ全行わず、増
幅ゲート部はPm短絡構造とせすにライフタイムキラー
をドープしたので、ターンオンに必要な最小のゲート電
流工GTが適切な大きさとなり、ターンオフ期間中に誤
点弧するおそれがなくなる。As described above, according to the present invention, the main GTO section has a Pya short-circuit structure and is not doped with a lifetime killer, and the amplification gate section has a Pm short-circuit structure and is doped with a lifetime killer, which is necessary for turn-on. The minimum gate current flow GT is an appropriate size, and there is no possibility of erroneous firing during the turn-off period.
図面は本発明に係る増幅ゲート形GTOの一実施例を示
す縦断面図である。
11補強用ターンゲステン板、2A及び2B・・・アノ
ードエミッタ、3・・・N層、4・・・P層、5A及び
5B・・・カソードエミッタ、6・・・ライフタイムキ
7一〇The drawing is a longitudinal sectional view showing an embodiment of an amplification gate type GTO according to the present invention. 11 Reinforcement Turngesten plate, 2A and 2B...Anode emitter, 3...N layer, 4...P layer, 5A and 5B...Cathode emitter, 6...Lifetime key 710
Claims (1)
、主サイリスタ部のみPit短絡構造とし、かつ増幅ゲ
ート部にのみライフタイムキラーヲト。 −ブしたことを特徴とする増幅ゲート形ゲートターンオ
フサイリスタ。[Claims] In a gate turn-off thyristor with an amplification gate structure, only the main thyristor part has a Pit short-circuit structure, and a lifetime killer is installed only in the amplification gate part. - An amplification gate type gate turn-off thyristor characterized by a double-circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11189882A JPS593969A (en) | 1982-06-29 | 1982-06-29 | Amplification gate type gate turn off thyristor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11189882A JPS593969A (en) | 1982-06-29 | 1982-06-29 | Amplification gate type gate turn off thyristor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS593969A true JPS593969A (en) | 1984-01-10 |
Family
ID=14572893
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11189882A Pending JPS593969A (en) | 1982-06-29 | 1982-06-29 | Amplification gate type gate turn off thyristor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS593969A (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5338988A (en) * | 1976-09-21 | 1978-04-10 | Nec Corp | Manufacture of semiconductor control rectifier |
JPS5362484A (en) * | 1976-11-16 | 1978-06-03 | Mitsubishi Electric Corp | Thyristor |
JPS5598858A (en) * | 1979-01-24 | 1980-07-28 | Hitachi Ltd | Gate turn-off thyristor |
JPS5721335U (en) * | 1980-07-09 | 1982-02-03 |
-
1982
- 1982-06-29 JP JP11189882A patent/JPS593969A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5338988A (en) * | 1976-09-21 | 1978-04-10 | Nec Corp | Manufacture of semiconductor control rectifier |
JPS5362484A (en) * | 1976-11-16 | 1978-06-03 | Mitsubishi Electric Corp | Thyristor |
JPS5598858A (en) * | 1979-01-24 | 1980-07-28 | Hitachi Ltd | Gate turn-off thyristor |
JPS5721335U (en) * | 1980-07-09 | 1982-02-03 |
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